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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 資訊工程學系
Please use this identifier to cite or link to this item: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/96172
Title: 最佳化超字組平行化中儲存指令向量化的切片選擇策略
Optimizing Slice Selection Strategy for Store Vectorization in Superword Level Parallelism
Authors: 陳至成
Chih-Cheng Chen
Advisor: 廖世偉
Shih-Wei Liao
Keyword: 單指令多資料流,超字組平行化,自動向量化,LLVM,
SIMD,SuperwordLevelParallelism(SLP),Auto-vectorization,LLVM,
Publication Year : 2024
Degree: 碩士
Abstract: 在現今由資料驅動計算的時代,處理大型資料集的需求日漸增長,使得程序運行效率成為研究的重點。當代的處理器普遍搭載了單指令多資料流(SIMD)處理單元,並且多數指令集架構也都支持各自的向量擴展指令集。例如,RISC-V支援RVV,而Arm架構則支援Neon和SVE。
自動向量化是編譯器的優化技術之一,它能夠自動地在編譯過程中將純量指令轉換為向量指令,讓開發者能夠利用向量處理單元的性能潛力,同時減少開發者撰寫程式的負擔。
本研究旨在透過優化儲存指令向量化的切片選擇策略,來增強LLVM中實作的超字組平行化(SLP),從而發掘更多潛在的向量化機會。此外,還在Arm處理器上進行了效能模擬,以檢驗此設計的實際增益。
In the current era of data-driven computing, the need for processing large datasets has grown exponentially, making program execution efficiency a critical focus of research. Most processors are equipped with Single Instruction, Multiple Data (SIMD) units, and modern instruction set architectures also support vector extensions, such as RVV for RISC-V, and Neon and SVE for Arm.
Auto-vectorization, a compiler optimization technique, transforms scalar code into vector instructions during compilation, allowing developers to fully exploit the performance potential of vector processing units while minimizing manual effort.
This study aims to enhance the Superword Level Parallelism (SLP) auto-vectorization implemented in the LLVM compiler by optimizing slice selection for Store vectorization, thereby uncovering more potential vectorization opportunities. Additionally, performance simulations were conducted on Arm processors to verify the practical benefits of the optimized algorithm.
URI: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/96172
DOI: 10.6342/NTU202404591
Fulltext Rights: 未授權
Appears in Collections:資訊工程學系

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