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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/94315| 標題: | 應用於第五代行動通訊毫米波頻段之壓控振盪器、多爾蒂功率放大器、與電感補償之分布式主動變壓器功率放大器研究 Research on Voltage-controlled Oscillator, Doherty Power Amplifier and Distributed-active-transformer Power Amplifiers with Compensation Inductor for the Fifth Generation Mobile Communication Millimeter-Wave Bands |
| 作者: | 梁宏 Hung Liang |
| 指導教授: | 林坤佑 Kun-You Lin |
| 關鍵字: | 毫米波,第五代行動通訊,K波段,Q波段,壓控振盪器,功率放大器,多爾蒂功率放大器,變壓器,離散主動式變壓器, Millimeter-wave,fifth-generation (5G),K-band,Q-band,Voltage-controlled-oscillator,Power amplifier,Doherty power amplifier,Transformer,DAT, |
| 出版年 : | 2024 |
| 學位: | 碩士 |
| 摘要: | 這篇論文分為三個部分,都是用於第五代行動通信系統之電路。
第一部分呈現了使用90奈米互補性氧化金屬半導體製程基於變壓器共振腔的K波段壓控振盪器,該設計著重於提供低相位雜訊和寬調諧範圍,並具有相對合理的壓控振盪器增益,此外,變容器的工作電壓需低於系統最高操作電壓,以便應用於實際的通信系統。因此在設計中使用變壓器共振腔和電容器陣列來實現合理的壓控振盪器增益,並且使用到可變電容的全部工作範圍。 第二部分呈現了使用90奈米互補性氧化金屬半導體製程的Ka波段的多爾蒂功率放大器,在本設計中採用電壓型輸出合成器來降低匹配損耗,並且由主路徑和輔助路徑組成,它們由兩級共源放大器結構組成,分別偏壓在在AB類和C類工作區,通過輸出匹配網路的阻抗轉換和自適應偏置電路,提高了輸出回退效率。 第三部分呈現了使用90奈米互補性氧化金屬半導體製程的Q波段使用離散主動式變壓器功率放大器。由於功率級的最佳負載接近25歐姆,這非常接近使用串聯輸出合成器時的阻抗。因此,採用了電壓型合成架構的離散主動式變壓器來減少負載變換比。在分析了離散主動式變壓器二次側的寄生電容效應後,設計了一個補償電感來提高功率合成效率。 This thesis is divided into three parts. They are all designed to use in fifth-generation (5G) mobile communication systems. The first presents a K-band VCO using transformer-based resonance tank fabricated in 90-nm CMOS process. The design is focused on providing low phase noise and wide-tuning range with reasonable low KVCO. Moreover, the operation voltage of the varactors is designed to be lower than system VDD to apply in practical communication systems. As a result, a transformer-based resonance tank and capacitor bank is designed to realize a reasonable low KVCO and utilize all the operation range of the varactors. The second presents a Ka-band Doherty PA fabricated in 90-nm CMOS process. The voltage-type output combiner is adopted to decrease the matching loss. The circuit is composed of the main path and an auxiliary path, which are composed of two-stage common-source amplifier structures biased in class-AB and class-C, respectively. It enhances the back-off PAE through the impedance conversion of the output matching network and the adaptive bias circuit. The last presents a Q-band PA using DAT structure in 90-nm CMOS process. The optimum load of the power stage is closed to 25 Ω, which is very closed to the impedance when using the series output combiner. As a result, a voltage type combining architecture, DAT, is adopted to reduce load transformation ratio. After analyzing the effect of the parasitic capacitors at the secondary side of the DAT, a compensated inductor is designed to increase the power combining efficiency. |
| URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/94315 |
| DOI: | 10.6342/NTU202403299 |
| 全文授權: | 未授權 |
| 顯示於系所單位: | 電信工程學研究所 |
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| 檔案 | 大小 | 格式 | |
|---|---|---|---|
| ntu-112-2.pdf 未授權公開取用 | 5.88 MB | Adobe PDF |
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