高性能凡德瓦高介電材料雙閘極二硫化鉬場效電晶體

Abstract

由於傳統介電材料如氧化鋁(Al2O3)和二氧化矽(SiO2)具有較高的熔點，直接通過熱蒸鍍在二維材料上沉積氧化層可能會導致破壞。因此，三氧化二銻(Sb2O3)由於其獨特的材料性質，可以作為二硫化鉬(MoS2)場效電晶體的閘極氧化層。三氧化二銻具有高介電常數(11.5)，其分子間透過凡德瓦力相互結合，在高真空(10-6 Torr)條件下於186℃昇華。三氧化二銻分子是雙環籠(bicyclic cage)結構，且無懸鍵結構，與二硫化鉬在界面處形成凡德瓦接觸，相較於傳統的氧化層提供了更卓越的介電性能。 在本研究中，該元件在室溫(T= 298K)下的上閘極(VTG)工作範圍為±1 V。最大汲極-源極電流(IDS)為0.21 µA，並展示出高達106的開關比。此元件的臨界電壓(VTH)為0.0088 V，次臨界擺幅(SS)為86.1 mV/dec，載子遷移率為13.5 cm2/Vs，遲滯為24mV。在常關態(normally-off state)的元件中，施加+8V的背閘極(VBG)，變為常開態(normally-on state)，IDS為0.74 µA，相比於常關態，載子遷移率提升355倍，遲滯僅為6.51mV。所有性能均具有高度競爭力，代表了在二維材料CMOS元件發展方面有顯著進步。

Due to the high melting point for the conventional dielectric material such as aluminum oxide (Al2O3) and silicon dioxide (SiO2), depositing oxide layers on two-dimensional materials directly via thermal evaporator may lead to damage. Therefore, antimony trioxide (Sb2O3), a high dielectric constant (11.5) material, can be the oxide layer in molybdenum disulfide (MoS2) field-effect transistors because of its unique material properties which molecules are bonded by van der Waals force and sublime at 186℃ in high vacuum (10-6 Torr) condition. Sb2O3 molecules are bicyclic cage structure which is free-dangling bond and form van der Waals contacts with MoS2 at the interface, offering superior performance compared to conventional oxide layers. In this study, the device has an applied range of ±1V for top gate (VTG) at room temperature (T = 298K). The maximum drain-source current (IDS) is 0.21 µA, and it exhibits a high on/off ratio of up to 106. The threshold voltage (VTH) for this device is 0.0088 V, the subthreshold swing (SS) is 86.1 mV/dec, the carrier mobility is 13.5 cm²/Vs and hysteresis is 24 mV. In a normally-off device, applying +8V to the back gate (VBG) switches it to a normally-on state. The IDS reaches 0.74 µA, which carrier mobility is 355 times larger than normally-off state, with a hysteresis of only 6.51 mV. All the performance are highly competitive, which represents significant progress in the development of two-dimensional material CMOS devices.