利用 NPN 等效電路匹配進行工程改變命令補丁最小化

Abstract

工程變更指令 (ECO) 在 IC 設計行業中至關重要，用於高效地解決錯誤和規格變更。儘管設計師努力創建無錯誤的設計，但角落案例和客戶驅動的變更常常需要快速更新。ECO 著重於識別和修補受影響的區域，並確保功能等效的前提下進行最小變更。 本研究通過兩階段方法來提升現有的 ECO 方法。在匹配階段，我們利用快速子電路 NPN 等效匹配來：1）通過識別易於修復的更正點來擴展輸入端邊界，2）識別輸出端邊界，解決輸出合併邊界的複雜性。在替換階段，我們通過引入偽布爾 (PB) 優化來高效回收浮動子電路，從而優化修補成本。

Engineering Change Order (ECO) is essential in the IC design industry for efficiently addressing bugs and specification changes. Despite efforts to create bug-free designs, corner cases and client-driven changes often necessitate quick updates. ECO focuses on identifying and patching affected areas with minimal changes to ensure functional equivalence. This work enhances existing ECO methodologies through a two-phase approach. In the matching phase, we utilize fast sub-circuit NPN-equivalence matching to: 1) extend the input side frontier by identifying easy-to-fix rectification points, and 2) identify the output side frontier by addressing the complexity of the output merge frontier. In the replacement phase, we optimize patch costs by incorporating Pseudo-Boolean (PB) optimization to efficiently recycle the floating sub-circuit.