靜電防護元件於高速差動介面中電磁暨射頻干擾抑制與訊號完整度改善

Abstract

在高速差動傳輸介面中，電磁干擾、射頻干擾以及靜電放電防護是非常重要的議題。當實際系統產生的共模雜訊經過連接器及轉接線等不連續處時，輻射雜訊將會被激發，干擾外部系統或系統內的無線模組。由外部產生的靜電放電，經由輸入輸出介面進到電子系統中，可能會對內部的元件或模組產生嚴重的傷害。為了解決上述高速差動傳輸介面中所面臨的問題，共模雜訊抑制及靜電防護技術已在數十年間大量發展。 本文中首先提出一設計方法，用以合成反射式及吸收式共模雜訊濾波器。兩種設計都實現在積體被動元件製程，展現極高的差模截止頻率及極小的面積768 × 724平方微米。反射式設計展現從2.4吉赫至12.0吉赫的共模雜訊抑制，吸收式設計則在3.0吉赫至4.0吉赫內吸收80%的共模雜訊，並在3.5吉赫達到97.2%的吸收峰值。 由於靜電防護元件及共模雜訊濾波器在高速差動輸入輸出介面中有關鍵作用，本文接著提出兩元件之共設計，共模等效電路類似橢圓低通濾波器。其中一級設計在2.22吉赫至2.76吉赫內抑制共模雜訊，增加一共模抑制單元的二級設計，可將共模雜訊抑制範圍擴大到2.25吉赫至8吉赫。兩種共設計電路之訊號完整度及靜電放電防護能力，分別由眼圖量測及系統級靜電放電模擬得到驗證。 本文最後提出一設計方法，同時解決靜電放電防護陣列上的差模到共模轉換並提升信號完整度。建立該元件之等效電路模型後，內側及外側之間不對稱的等效電感及等效電阻，利用電感等化以及匹配電路來補償。模態轉換低於 -30 dB的範圍從4.1吉赫延伸至8.8吉赫。補償電路之眼高在每秒12千兆位元的傳輸速率下，有20%的改善。

In high-speed differential interfaces, electromagnetic interference, radio-frequency interference and electrostatic discharge protection are important issues. Radiated noise is excited when common-mode noise generated by practical system propagates through discontinuities such as connectors, cables, etc. The radiation may interfere external systems or internal wireless modules. Electrostatic discharges from external sources to input/output interfaces of electronic systems may cause fatal damage to internal devices and modules. To overcome these problems faced in high-speed interface, common-mode noise suppression and electrostatic discharge protection techniques have been developed for several decades. In the beginning of this dissertation, a design methodology is introduced to synthesize a reflective and an absorptive common-mode filter. Both designs implemented on integrated passive device process perform ultra-high differential-mode cutoff frequency and compact size of 768 × 724 μm2. The -10 dB common-mode noise suppression of reflective design is from 2.4 GHz to over 12.0 GHz. The absorptive design absorbs more than 80% of the common-mode noise from 3.0 GHz to 4.0 GHz, with 97.2% peak absorption at 3.5 GHz. Next, a co-design of electrostatic discharge protection device and common-mode filter implemented on printed circuit board is introduced since these components are essential in high-speed differential I/O interfaces. The common-mode equivalent circuit is pseudo-elliptic low-pass filter. The proposed one-stage design performs -10 dB common-mode noise suppression from 2.22 GHz to 2.76 GHz; the proposed two-stage design with additional common-mode suppression unit performs broadband suppression from 2.25 GHz to over 8 GHz. The signal integrity and the ESD protection function of proposed designs are investigated by eye diagram measurement and system-level ESD simulation. Finally, a design methodology is introduced to suppress the differential-mode to common-mode conversion and enhance signal integrity of electrostatic discharge protection array. The equivalent circuit model is extracted and the asymmetrical inductances and resistances between inner and outer lane are compensated by inductance equalization and LC matching circuit. The -30 dB mode conversion level is extended from 4.1 GHz to 8.8 GHz. The eye height of proposed compensation circuit is enhanced 20% at 12 Gb/s.