GATK變異探索工具的分析與加速

Abstract

本論文提出一個專門針對生物基因定序(DNA Sequencing)應用軟體GATK (Genome Analysis Tool-Kit)中的變異探索(Variant Discovery)流程改良的硬體加速電路設計。有鑑於生物醫學的研究與發展、次世代定序(Next Generation Sequencing)技術的發明，使得基因定序技術在近年來已有相當大幅度地突破，現今的基因定序應用軟體以由Broad Institute所發展的GATK基因體分析工具包較為著名，並在生物醫學領域被廣泛研究使用。然而這類軟體仍存在著許多先天上的不足之處，例如：執行效能受限於其軟體開發環境、部份功能的演算法效率不佳等，因此亟需以另一種方式實現GATK以解決上述問題。 在本論文中我們會以軟體語言(C++)以及硬體描述語言(Verilog HDL)對GATK中的變異探索流程進行重新設計：包含簡化流程中的演算法並降低運算複雜度、使用平行化的硬體架構達到加速目的；並在硬體描述語言上，透過 Field Programmable Gate Array (FPGA)驗證我們的設計。目前在硬體模擬已達到相較軟體約25倍的整體速度提升。

This work presents a digital hardware design to accelerate the Variant Discovery phase in Genome Analysis Tool-Kit (GATK) [1], which is a software package designed for analyzing high-throughput sequencing data. With the progress of research and development in the Biomedical field and the invention of Next Generation Sequencing (NGS) technique, there is a huge breakthrough on producing large DNA sequence data for analysis. Many software tools have been developed to assist DNA sequencing, such as GATK, a well-known Java based command line tool used by many Biomedical Scientists. However, these kinds of tools suffer from the low performance issue caused by their software development environment, and some of the algorithms may not work perfectly under certain special cases. Therefore, a new design using other language and platform is needed for further clinical analysis and research. In this work, we redesign HaplotypeCaller, a core tool in the Variant Discovery phase of GATK, using Verilog HDL and C++ language, and realize our Verilog design on a ZedBoard [2] FPGA. The performance of our hardware design achieved an average speed-up of 20,000 times compared to the software version of GATK. The overall performance to our software and hardware co-design platform still achieved a speed-up of 25 times.