分子束磊晶成長氧化釔/砷化銦鎵之金氧半電容及 砷化鎵基反轉通道金氧半場效電晶體之電性研究

Abstract

過去幾十年來都以矽及二氧化矽為材料所製作之互補式金氧半場效電晶體(CMOS) ，業界為了提升元件性能及製程成本而不斷縮小尺寸以符合摩爾定律，然而在邁入10奈米技術結點後其微縮將面臨材料本質特性上的限制及物理極限，使製程微縮效益降低及成本上升。 三五族化合物半導體相對於矽半導體擁有較高的電子遷移率，在相同的電晶體尺寸下三五族化合物半導體可以擁有較高的輸出電流及較快的操作速度，所以三五族化合物半導體被視為取代矽基材的重要材料之一。砷化鎵和業界所使用的矽和二氧化矽之介面不同，砷化鎵和高介電係數氧化層很難擁有良好的介電特性，因此在電容電壓的量測下，頻率分散及很高的介面缺陷是很常見的現象。 本實驗利用分子束磊晶成長高品質砷化鎵在砷化鎵基板並成長砷化銦镓為通道材料，接著在高真空的條件下將樣品傳到氧化物成長腔體再利用分子束磊晶及原子層沉積成長高介電係數氧化釔及氧化鋁，再以氧化鋁/氧化釔/砷化銦镓/砷化鎵結構製作金氧半元件。透過電容電壓量測，頻率於500~1M H之間，在累積區(accumulation region)有極低的頻率分散(~3%),很小的介面缺陷(~3.5×1011 eV-1cm-2)及很高的熱穩定性(~1000℃)。以氧化鋁/氧化釔/砷化銦鎵/砷化鎵結構搭配金屬閘極所製作之自我對準反轉n型通道砷化鎵基金氧半場效電晶體已成功實現，在閘極長度1 μm，閘極寬度 5μm的元件中展示最大汲極電流9.6 μA/μm以及最大的開關電流比 ~104.5 之特性。 此優異的電性結果表示本實驗成長之異質結構有很好的高溫穩定性及介面特性，同時也展現了三五族半導體應用於未來高效能與低功耗的電子元件中具有相當優秀的潛力。

Si-based metal oxide semiconductor field-effect -transistors (MOSFETs) have undergone extreme scaling in the past few decades fulfilling Moore's law. As the production for 7 nm node complementary MOS (CMOS) is around the corner, diverse solutions have been proposed for future high speed CMOS devices. Among them, introducing high carrier mobility III-V compound semiconductors as channel material is a very promising approach. It provides an effective way to enhance the device performance having less power consumption without the need for further aggressive scaling. In this thesis, low interfacial trap density (Dit) and high temperature thermal stability have been achieved with in-situ molecular-beam-epitaxy (MBE) Y2O3 on In0.1Ga0.9As (001). In this work, the hetero-structure has endured 1000 oC post deposition annealing while maintaining a leakage current density at 10-8 A/cm-2 and well-behaved capacitance-voltage (C-V) characteristics. Ultra-low frequency dispersions of 3% and 11.8% in C-V at accumulation region were obtained on p-type and n-type In0.1Ga0.9As(001), respectively. Low Dit values of (3.5-20)×1011 eV-1cm-2 were extracted by quasi-static CV (QSCV) in the whole bandgap of InGaAs. Therefore, in-situ MBE-Y2O3 has effectively passivated In0.1Ga0.9As (001) with excellent thermal stability at very high temperatures and a low Dit, critical for enabling the fabrication of high performance InGaAs MOSFETs. The device performance of a 1 µm gate length self-aligned inversion-channel In0.1Ga0.9As MOSFET on GaAs (001) substrate using a gate dielectric of Al2O3 (5 nm thick)/Y2O3 (1.5 nm thick) with a maximum drain current of 9.6 μA/μm. For improve the device performance, we deposition SiO2 to protect gate region before ion-implantation process, the drain leakage current in off-state and Ion/Ioff ratio are improve from 10-4 μA/μm to 10-7 μA/μm and 2.7 to 4.5 respectively.