使用電漿增強型原子層沉積技術探討電漿處理及鐵電負電容之研究

Abstract

本論文主要分為兩個部分，第一部分在介紹電漿處理對薄膜的影響。在原子層沉積(Atomic layer deposition)製程中加入電漿處理後，發現薄膜厚度有被抑制的效果。而經電漿處理後的薄膜，其金氧半電容元件比一般ALD製程，也有較佳的電性表現。第二部分為鐵電負電容效應的研究。我們使用電漿增強型原子層沉積技術製作氧化薄膜，可以得到具有鐵電性的材料。而氧化物薄膜會因為其厚度增加而有較低的殘留極化值，可能由於內部有非鐵電相的存在。以此鐵電材料堆疊於順電材料上時，可發現電容放大的效應。

This paper is divided into two parts. The first part investigates the effect of plasma treatment on the film prepared by the atomic layer deposition (ALD). When the plasma treatment was introduced to the ALD process, it was found that the film thickness was suppressed. The plasma-treated metal-oxide-semiconductor capacitors also reveal better electrical performance than that treated by the conventional ALD process. The second part is the study of the negative capacitance effect of ferroelectric thin films. Plasma-enhanced atomic layer deposition was used to prepare ferroelectric thin films. The residual polarization of the ferroelectric oxide thin film decreases with the increasing film thickness, attributed to the presence of a non-ferroelectric phase. The effect of capacitance enhancement can be observed when the ferroelectric thin film is stacked on a paraelectric layer.