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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/64164完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 林宗賢 | |
| dc.contributor.author | Chun-Yu Lin | en |
| dc.contributor.author | 林君豫 | zh_TW |
| dc.date.accessioned | 2021-06-16T17:32:55Z | - |
| dc.date.available | 2022-08-15 | |
| dc.date.copyright | 2012-08-19 | |
| dc.date.issued | 2012 | |
| dc.date.submitted | 2012-08-15 | |
| dc.identifier.citation | [1] Y. H. Liu, C. L. Li, and T. H. Lin, “A 200-pJ/b MUX-based RF transmitter for implantable multichannel neural recording,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 10, pp. 2533-2541, Oct. 2009.
[2] IEEE 802.15.4 Standard, 1451.5-2007, Oct. 2007. [3] J. Bae, N. Cho, and H. J. Yoo, “A 490-uW fully MICS compatible FSK transceiver for implantable devices,” in Proc. IEEE Symp. VLSI Circuits Dig. Tech. Papers, Jun. 2009, pp. 36–37. [4] S. Pasuopathy, “Minimum shift keying : A spectrally efficient modulation,” IEEE Communication Magazine, vol. 17, no. 4, pp. 14-22, Apr. 1979. [5] Y. H. Liu, H. H. Lo, L. G. Chen, and T. H. Lin, “A 15-mW 2.4-GHz IEEE 802.15.4 transmitter with a FIR-embedded phase modulator,” in Proc. IEEE Asian Solid-State Circuits Conf. Dig. Tech. Papers, Nov. 2011, pp. 281-284. [6] P. Choi, H. Park, I. Nam, K. Kang, Y. Ku, S. Shin, S. Park, T. Kim, H. Choi, S. Kim, S. M. Park, M. Kim, S. Park, and K. Lee, “An experimental coin-sized radio for extremely low power WPAN (IEEE802.15.4) application at 2.4GHz,” in Proc. Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2003, pp. 478-480. [7] W. Kluge, F. Poegal, H. Roller, M. Lange, T. Ferchland, L. Dathe, and D. Eggert, “A fully integrated 2.4-GHz IEEE 802.15.4 compliant transceiver for Zigbee applications,” in Proc. Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2006, pp. 372-374. [8] G. Retz, H. Shanan, K. Mulvaney, S. O'Mahony, M. Chanca, P. Crowley, C. Billon, K. Khan, and P. Quinlan, “A highly integrated low-power 2.4-GHz transceiver using a direct-conversion diversity receiver in 0.18 um CMOS for IEEE 802.15.4 WPAN,” in Proc. Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2009, pp. 414-415. [9] A. Wong, M. Dawkins, G. Devita, N. Kasparidis, A. Katsiamis, O. King, F. Lauria, J. Schiff, and A. Burdett, “A 1V 5mA multimode IEEE 802.15.6/Bluetooth low-energy WBAN transceiver for biotelemetry applications,” in Proc. Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2012, pp. 300-302. [10] M. K. Raja, X. Chen, Y. D. Lei, Z. Bin, B. C. Yeung, and Y. Xiaojun, “A 18-mW Tx, 22-mW Rx transceiver for 2.45-GHz IEEE 802.15.4 WPAN in 0.18 um CMOS,” in Proc. IEEE Asian Solid-State Circuits Conf. Dig. Tech. Papers, Nov. 2010, pp. 9-12. [11] J. Yuan and C. Svensson, “New single-clock CMOS latches and flipflops with improved speed and power saving,” IEEE J. Solid-State Circuits, vol. 32, no. 1, pp. 62-69, Jun. 1997. [12] R. G. Meyer, “Low-power monolithic RF peak detector analysis,” IEEE J. Solid-State Circuits, vol. 30, no. 1, pp. 65-67, Jun. 1995. [13] S. Diao, Y. Zheng, Y. Gao, X. Yuan, M. Je, and C. H. Heng, “A 5.9-mW 50-Mbps CMOS QPSK/O-QPSK transmitter employing injection locking for direct modulation,” in Proc. IEEE Asian Solid-State Circuits Conf. Dig. Tech. Papers, Nov. 2010, pp. 5-8. [14] P. E. Su and S. Pamarti, “A 2.4-GHz wideband open-loop GFSK transmitter with phase quantization noise cancellation,” IEEE J. Solid-State Circuits, vol. 46, no. 3, pp. 615-626, Mar. 2011. [15] J. Pandey and B. P. Otis, “A sub 100-uW MICS/ISM band transmitter based on injection-locking and frequency multiplication,” IEEE J. Solid-State Circuits, vol. 46, no. 5, pp. 1049-1058, May 2011. [16] Z. Chen, K. W. Cheng, Y. Zheng, and M. Je, “A 3.4-mW 54.24-Mbps burst-mode injection-locked CMOS FSK transmitter,” in Proc. IEEE Asian Solid-State Circuits Conf. Dig. Tech. Papers, Nov. 2011, pp. 289-292. [17] J. Bae, L. Yan, and H. J. Yoo, “A low energy injection-locked FSK transceiver with frequency-to-amplitude conversion for body sensor applications,” IEEE J. Solid-State Circuits, vol. 46, no. 4, pp. 928-937, Apr. 2011. [18] Y. H. Chee, A. M. Niknejad, and J. M. Rabaey, “An ultra-low-power injection locked transmitter for wireless sensor networks,” IEEE J. Solid-State Circuits, vol. 41, no. 8, pp. 1740-1748, Aug. 2006. [19] E. Hegazi and A. A. Abidi, “A 17-mW transmitter and frequency synthesizer for 900-MHz GSM fully integrated in 035 um CMOS,” IEEE J. Solid-State Circuits, vol. 38, no. 5, pp. 782-792, May 2003. [20] B. Cook, A. Berny, A. Molnar, S. Lanzisera, and K. Pister, “Low-power 2.4-GHz transceiver with passive RX front-end and 400 mV supply,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2757–2766, Dec. 2006. [21] Y. H. Liu and T. H. Lin, “A wideband PLL-based G/FSK transmitter in 0.18 um CMOS,” IEEE J. Solid-State Circuits, vol. 44, no. 9, pp. 2452-2462, Sep. 2009. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/64164 | - |
| dc.description.abstract | 在無線傳輸系統中,低功耗以及高效能是主要的設計考量。本論文提出一可達到低功耗及高效能之調變架構。在傳統的以混波器為基底之發射機系統中,數位類比轉換器, 濾波器以及混波器會消耗大量的電流,並且會帶來許多類比電路的非理想效應。本調變系統的核心電路為一相位選擇器,用來取代上述電路以達到低功耗的效能,並且基於開路調變的特性,本系統可達到高傳輸效率的表現。
第一個作品為應用於二十四億赫茲之無線射頻發射器,使用相位切換之架構支援OQPSK, HS-OQPSK, 8-PSK,以及16-QAM之調變。本傳輸器實現於90奈米製程。量測結果顯示本傳輸系統在 -3 dBm的輸出功率下傳輸速度最高可達105 Mbps。其EVM值小於10.6 %,而在操作電壓為1.2伏特下消耗功耗為9.25毫瓦。第二個作品為第一個作品之改進版本,分別對嵌入式FIR濾波器所產生的數位突波以及16-QAM調變下的準確度做改進。 第三個作品為一應用於生醫系統之無線射頻發射器,使用邊緣合併以及相位切換之技術達到低功耗以及高傳輸速率。本晶片實現於0.18微米互補式金氧半製程,其效能於0.8伏特供應電壓下消耗330微瓦並達到15 Mps的傳輸資料量。 | zh_TW |
| dc.description.abstract | In the wireless communication system, low power and high efficiency are major concern, and this thesis proposes a modulation architecture which can achieve low power and high data rate requirement. For a traditional mixer-based transmitter architecture, the DACs, filters, and mixers consume large power under high data rate and induce many non-idealities of analog circuits. The core of the proposed modulation architecture is a phase selector, which replaces these analog circuits and achieves low-power performance. Furthermore, the open loop characteristic facilitates the high data rate operation.
The first work is a 2.4-GHz wireless transmitter, which adopts phase selector technique and can support OQPSK, HS-OQPSK, 8-PSK, and 16-QAM modulation. This chip is fabricated in a 90-nm CMOS process. The experimental results show that the transmitter delivers 105-Mbps maximum data rate under -3 dBm output power. The EVM is lower than 10.6 %, and the total power consumption of the transmitter is 9.25 mW under a 1.2-V supply. The second work is improved from the first work. The improvement includes the FIR digital spur reducing and enhancing accuracy in 16-QAM modulation. The third work is for bio-medical wireless application. This work can achieve low power and high data rate by using edge combining and phase selector technique. This chip is fabricated in a 0.18-um CMOS process. The transmitter consumes 300 uW at 15 Mbps from a 0.8-V supply. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-16T17:32:55Z (GMT). No. of bitstreams: 1 ntu-101-R99943037-1.pdf: 5988569 bytes, checksum: 067cae10c573b2747ce174e1d564a5d3 (MD5) Previous issue date: 2012 | en |
| dc.description.tableofcontents | 致謝 ix
摘要 xi Abstract xiii Table of Contents xv List of Figures xix List of Tables xxiv Chapter 1 Introduction 1 1.1 Motivation 1 1.1.1 Energy-Efficiency Transmitter for M2M/WSN applications 1 1.1.2 Transmitter for Bio-Medical Applications 2 1.2 Thesis Overview 3 Chapter 2 Digital Modulation Schemes and Transmitter Architectures 4 2.1 Modulation Scheme Considerations 4 2.2 PSK Modulation Schemes 5 2.2.1 BPSK Modulation Scheme 5 2.2.2 QPSK Modulation Scheme 5 2.2.3 Offset-QPSK Modulation Scheme 7 2.2.4 OQPSK with Half-Sine Shaping Modulation Scheme 8 2.2.5 8-PSK and 16-QAM Modulation Schemes 10 2.3 Transmitter Architectures 10 2.3.1 Mixer-Based Transmitter 11 2.3.2 PLL-Based Transmitter 11 2.3.3 Phase-Selector Based Transmitter 12 Chapter 3 Phase-Selector Based Transmitter 14 3.1 Phase Selector Operation Principle 14 3.2 Proposed Energy-Efficient Transmitter for M2M/WSN Applications 17 3.2.1 OQPSK and 8-PSK Modulation Realization 18 3.2.2 HS-OQPSK Modulation Realization 19 3.2.3 16-QAM Modulation Realization 21 3.3 Building Blocks 22 3.3.1 Phase-Lock Loop (PLL) System 22 3.3.2 Voltage-Controlled Oscillator and Quadrature Generator 23 3.3.3 Phase Frequency Detector and Charge Pump 24 3.3.4 Divider 24 3.3.5 8-Tap Phase Selectors 25 3.3.6 Output Stage 26 3.4 Analysis 27 3.4.1 Quadrature Signals Mismatch 27 3.4.2 Non-Ideal Switching of The Data Switches 27 3.4.3 Half-Sine Shaping Analysis 29 3.4.4 Current Mismatch in Phase Interpolation 31 3.5 Simulation Results 31 3.5.1 Behavior Model Simulation Results 32 3.5.2 Frequency Synthesizer Simulation Results 33 3.5.3 Transmitter Simulation Results 36 3.6 Transmitter with Improved Capability 39 3.6.1 FIR Digital Spur 39 3.6.2 Amplitude Control Loop 40 3.6.3 Phase Sensing Block 41 3.6.4 Phase Tuning Block 42 3.6.5 AM-PM Distortion 43 3.6.6 Proposed TX Architecture 44 3.6.7 Simulation Results 45 Chapter 4 Experimental Results 52 4.1 Chip Photo 52 4.2 Test Setup 53 4.3 PCB Board 54 4.4 Measurement Results 55 4.4.1 PLL Measurement 55 4.4.2 Low Data Rate Measurement (< 10 Mbps) 57 4.4.3 Median Data Rate Measurement (25 Mbps) 60 4.4.4 High Data Rate Measurement (> 50 Mbps) 63 Chapter 5 Low-Power MICS Band Transmitter 67 5.1 Introduction Prior Arts of Low-Power MICS Band Transmitter 67 5.2 Prior Art of Edge-Combining Transmitter 67 5.3 Proposed Low-Power MICS Band Transmitter 68 5.4 Building Blocks 69 5.5 Simulation Results 72 5.6 Experimental Results 75 5.6.1 Chip Photo and Measurement Setup 75 5.6.2 Measurement results 77 Chapter 6 Conclusion and Future Works 82 6.1 Conclusion 82 6.2 Future Works 83 6.2.1 Phase Calibration Loop 83 6.2.2 High-Speed and Low-Power FSK Transmitter 84 References 87 | |
| dc.language.iso | en | |
| dc.subject | 邊緣合併技術 | zh_TW |
| dc.subject | 相位選擇器 | zh_TW |
| dc.subject | 半弦慮波器之OQPSK 調變 | zh_TW |
| dc.subject | Phase Selector | en |
| dc.subject | Edge-combining technique | en |
| dc.subject | HS-OQPSK modulation | en |
| dc.title | 具高能量效率之射頻發射器 | zh_TW |
| dc.title | Design of Energy-Efficient Wireless Transmitters | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 100-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 黃柏鈞,劉深淵,李泰成 | |
| dc.subject.keyword | 相位選擇器,半弦慮波器之OQPSK 調變,邊緣合併技術, | zh_TW |
| dc.subject.keyword | Phase Selector,HS-OQPSK modulation,Edge-combining technique, | en |
| dc.relation.page | 89 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2012-08-15 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位: | 電子工程學研究所 | |
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