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標題: | 氧化層局部薄化對具同心環閘極控制電荷耦合金氧半穿隧二極體特性影響之探討 Characterization of Oxide Local Thinning Effects on Charge-Coupled MIS(p) Tunnel Diodes with Concentric Gate |
作者: | Tzu-Hao Chiang 江子豪 |
指導教授: | 胡振國 |
關鍵字: | 電晶體,金氧半穿隧二極體,低功耗, Transistors,MIS tunnel diodes,Low power, |
出版年 : | 2020 |
學位: | 碩士 |
摘要: | 本篇論文旨在以製程技術和理論計算模擬的方式,探討氧化層局部薄化對電荷耦合金氧半(P型)穿隧二極體特性的影響。不同於過往以破壞性的方法對氧化層施加一段時間正偏壓達到等效局部薄化的效果,本篇提出在閘/汲極氧化層製作局部薄化的結構,發現其仍能使此種元件擁有良好電晶體特性。
在第二章中,我們首先呈現在閘/汲極的局部薄化氧化層分別對元件轉移特性的影響,可以看到若閘極氧化層存在此結構,能使該元件展現出低於60 mV/decade的次臨界擺幅,而若汲極氧化層存在此結構,則整體工作電壓能再大幅降低。此外,透過改變局部薄化氧化層區域的數量和面積,元件的次臨界擺幅得以進一步降至8.4 mV/decade,並維持三個級距的電流大小。 在第三章中,我們呈現局部薄化氧化層厚度對元件臨界電壓值和漏電流大小的強烈影響。具體而言,愈薄的氧化層厚度能使元件臨界電壓值愈往平能帶電壓靠近,然而由於漏電流也因此增大,使最後得到的次臨界擺幅未必更低,甚至可能變高。因此,對於局部薄化氧化層厚度的控制,在該元件低功耗操作考量之下,是個非常重要的環節。 最後,在本篇論文各個章節的討論中,亦利用二維TCAD模擬計算輔助,闡述關於局部薄化氧化層結構其物理參數對此種元件的影響,例如數量、面積以及厚度,並以實驗數據作為佐證。我們根據實驗和模擬結果,可以對氧化層局部薄化效應做出更完整的描述與結論,期望使電荷耦合金氧半穿隧二極體能成為未來低功耗應用的潛在方案之一。 In this thesis, oxide local thinning (OLT) effects on the performance of charge-coupled metal-insulator semiconductor tunnel diodes (MIS TDs) with p-type substrate were characterized through process techniques and simulation. Unlike the destructive and uncontrollable treatment of positive voltage stress (PVS) method applied to the oxide layer as reported before, such a device with fabricated OLT regions at the gate and drain was found to present desirable characteristics as a transistor with low power consumption. In Chapter 2, the overview of OLT effects realized by fabrication on the transfer characteristics of the charge-coupled MIS TDs was given. With OLT regions at the gate, sub-60 mV/decade subthreshold swing (SS) of such a device could be obtained at room temperature, whereas the operating voltage could be largely reduced with those at the drain. Also, by adjusting the number and area of the OLT regions, SS could be possibly optimized to a much lower value, e.g., 8.4 mV/decade over 3 current decades. In Chapter 3, threshold voltage (VT) and leakage current of such a device was found strongly affected by the thickness of the OLT regions. Specifically, VT could be tuned closer to the flat-band voltage by thinning the OLT thickness. However, SS was also compromised when the leakage current level was raised with thinner oxide. Therefore, a precise control of this process parameter would be of great importance for low power consideration. TCAD 2-D simulation was carried out to explain the roles of several physical parameters, such as the number, area, and thickness of the OLT regions throughout this thesis. The results corresponded with the observation from the experiments, and the conclusion was made on such devices having the potential for low power applications in the near future. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/62194 |
DOI: | 10.6342/NTU202001026 |
全文授權: | 有償授權 |
顯示於系所單位: | 電子工程學研究所 |
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