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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/61956
Title: | 超低功率消耗之低雜訊放大器和接收器設計與分析 Design and Analysis of Ultra Low Power LNA and Microwatt Radio |
Authors: | Chia-Lin Hsieh 謝佳霖 |
Advisor: | 黃天偉 |
Keyword: | 低雜訊放大器,混頻器, Low-noise amplifier(LNA),resistive ring mixer, |
Publication Year : | 2013 |
Degree: | 碩士 |
Abstract: | 本篇論文,為克服互補式金氧半導體製程限制,提出了一系列與低雜訊放大器相關的低功率消耗電路架構之設計與分析。
在第二章中,一個5 GHz、低直流功率消耗之低雜訊放大器被提出且適用於行動通訊應用上。藉由使用電流重複利用、以及基極偏壓等技術,使得此低雜訊放大器於5 GHz能操作在低電源電壓之下且其直流功率消耗只有336微瓦,還能具有相當的小訊號增益。為了進一步地降低雜訊指數與偏壓電流,使用變壓器回授技術有利於在雜訊指數與輸入端匹配的取捨。 在第三章中,一個24 GHz低直流功率消耗之低雜訊放大器被提出。第一級放大器承襲第二章所用增益提升架構,藉由在共閘極放大器的閘極和源極間使用變壓器回授技術,使小訊號增益有效提升和具有很低的雜訊指數。為了在頻率較高的操作下,後級放大器還能有高效率的增益表現,第二級採用共源極放大器搭配變壓器和電容所產生正回授的架構。比起一般的共源極放大器有更高的增益,此方法能在不額外消耗功率的狀況下提供高的增益,使的在低電源電壓之下,其直流功率消耗只有1.5毫瓦。由於兩級電路皆由變壓器所組成,故面積也相當的小。 在第四章中,一個24 GHz低直流功率消耗之低雜訊放大器搭配電阻式的混頻器被提出。承襲第三章所用源極放大器搭配變壓器和電容的正回授架構,為了結合低雜訊放大器和混頻器,頻寬不能太窄,所以第一級放大器採用共源極放大器的閘極和源極間使用變壓器回授技術,比起共閘極的變壓器回授技術能有較寬的頻寬。由於一般在超低功率消耗的操作下,雜訊指數都得靠前級的增益來抑制,故把所有的功耗都使用在低雜訊放大器上,混頻器則使用電阻式的架構,其直流功耗為零。在超低電源電壓之下,整體接收電路直流功率消耗只有683微瓦。由於全部電路都由變壓器所組成,故面積也相當的小。 論文的第一章和第五章則分別是論文的動機介紹和本碩士論文完成的工作之結論。 To alleviate the limitations imposed on CMOS technique, some low power techniques are developed for CMOS LNA circuits in this thesis. In chapter 2, an ultra-low-power and low-noise amplifier is presented for CMOS RF frontends. By employing current-reused, and forward-body-bias techniques, a low-noise amplifier can operate at a reduced supply voltage with micro-watt dc power consumption while maintaining reasonable gain performance at 5 GHz. To reduce noise factor and bias current simultaneously, transformer feedback technique is selected to make compromise between noise figure and input matching. In chapter 3, a low-power 24-GHz transformer LNA is proposed. Similar to chapter 2, a source-gate transformer-coupled common-gate device is utilized in first stage for high gain performance. Furthermore, transformer-based positive-feedback technique is used in second stage to enhance small-signal gain. By employing these two transformer-feedback techniques and forward-body-bias, a low-noise amplifier can operate at a reduced supply voltage with mili-watt dc power consumption while maintaining reasonable gain performance at 24 GHz. In Chapter 4, an ultra-low-power 24-GHz receiver front-end is reported. Different from chapter 3, a gate-source transformer-feedback common-source device is utilized in first stage for wideband matching. Furthermore, transformer-based positive-feedback technique is used in second stage to boost small-signal gain. By employing transformer-feedback technique and forward-body-bias, the LNA can operate at an ultra-low voltage of 0.33V with only 683 μW dc power consumption. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/61956 |
Fulltext Rights: | 有償授權 |
Appears in Collections: | 電信工程學研究所 |
Files in This Item:
File | Size | Format | |
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ntu-102-1.pdf Restricted Access | 4.55 MB | Adobe PDF |
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