請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/61433
標題: | V頻段發射器與向量疊加式相移器之研究 Research on V-band Transmitter and Vector-sum Phase-shifter |
作者: | Yao-Chia Yang 楊燿嘉 |
指導教授: | 林坤佑(Kun-You Lin) |
關鍵字: | 混頻器,向量疊加式相移器,低相位變異可變增益放大器,發射器,V頻段,CMOS, Mixer,Vector-sum phase shifter,low phase-variation variable-gain amplifier (VGA),transmitter,V-band,CMOS, |
出版年 : | 2013 |
學位: | 碩士 |
摘要: | 本碩士論文探討應用於微波及毫米波頻段發射器與向量疊加式相移器之研究。
論文的第一部分描述一個使用65奈米先進金氧互補半導體製程之60 GHz發射器電路。此發射器當中的混頻器,設計上除了考慮系統偏壓上的設定、外差(heterodyne)發射器架構的頻帶規劃,還有系統線性度上的考量。本論文採用了一種根據Gilbert-cell混頻器(Gilbert-cell mixer)的架構,但轉導級以反向器型態放大器(inverter-type amplifier)實現,進而同時達到提供增益與減輕Gilbert-cell混頻器電壓空間的負擔。量測結果顯示在4.32-8.64 GHz頻帶內有-2 dB的轉換增益,輸出功率1 dB壓縮點在操作頻帶內都能大於-7 dBm,LO-to-RF的隔絕也能大於45 dB。而發射器的量測結果顯示頻帶內能有30 dB的小訊號功率增益以及最大輸出功率能大於12.8 dBm。 再者,我們使用90奈米CMOS製程設計一個57 ~ 64 GHz的向量疊加式相移器。此電路希望藉由主動式的架構,使得傳送信號的增益提高。此外,透過相位補償式可變增益放大器,使得基頻控制電壓產生的相位誤差降低,藉此降低信號誤差,使得此調變器不需經過校準即可有較好的信號品質。量測結果顯示在57-64 GHz頻帶內維持0.5 dB的最大小訊號功率增益,以及在57 ~ 64 GHz間,均可達到360度的相移效果,以及20 dB的振幅控制。 In this master thesis, we discuss the researches of transmitter and vector-sum phase shifter for microwave or millimeter-wave applications. In the first place, we present a V-band heterodyne transmitter, realized in 65-nm CMOS process. Among the heterodyne transmitter, the proposed up-conversion mixer is designed in consideration of capable biasing in the system, spectrum planning and sufficient linear output power for the latter stages. The up-conversion mixer is therefore adopts conventional Gilbert-cell mixer topology with modified trans-conductance stage (inverter-type amplifier). It effectively provides the extra trans-conductance in the same biasing and in the meanwhile relaxes the headroom in the conventional Gilbert-cell topology. It is measured with -2-dB conversion gain from 4.32 GHz to 8.64 GHz. Output 1-dB compression power is guaranteed larger than -7 dBm inside the operational bandwidth. LO-to-RF isolation is also larger than 45 dB. Moreover, the proposed heterodyne transmitter is measured with 30-dB small signal gain and minimum 12.8-dBm saturation power from 57 GHz to 66 GHz. On the other hand, we propose a V-band vector-sum phase shifter in 90-nm CMOS process. This phase shifter is expected to increase the insertion gain with insertion of active topology. Also, we adopt the low phase-variation VGA to minimize the unexpected phase error, and therefore obtain the accurate signal without complex calibration works. It is measured with 0.5-dB small signal gain from 57 GHz to 64 GHz. 360° continuous phase control and 20-dB amplitude control are also guaranteed in the measurement. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/61433 |
全文授權: | 有償授權 |
顯示於系所單位: | 電信工程學研究所 |
文件中的檔案:
檔案 | 大小 | 格式 | |
---|---|---|---|
ntu-102-1.pdf 目前未授權公開取用 | 6.7 MB | Adobe PDF |
系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。