無摻雜矽/矽鍺異質接面之二維電子氣直流與交流電性分析

Abstract

隨著電晶體尺寸持續微縮至原子尺度，尋找其他材料、結構或新型計算元件也越形重要。量子計算利用電子的量子自旋疊加狀態進行邏輯運算，其速度比傳統利用電荷之邏輯元件快非常多。在固態系統中，利用半導體異質接面所形成的二維電子氣系統最常被用來製作量子計算元件的系統，而在眾多異質接面系統中，矽/矽鍺異質接面因其核子自旋干擾小，且與傳統矽積體電路製程相容，引起科學界很大的注目，本論文即針對矽/矽鍺異質接面形成的二維電子氣進行深入的研究。 欲量測二維系統中的電子傳輸特性，一般常用的分析技術為霍爾量測，我們自行設計架設可變溫霍爾量測系統，並分別測量二維電子氣的直流與交流電性，藉由製作具有閘極的霍爾元件而改變二維電子通道的電導，我們首度在二維電子氣中發現微分負電阻的特性，主要的原因為低溫下，二維電子系統會因為表面缺陷，使其電子濃度先超過熱平衡之後，電子透過量子穿隧效應至表面層，進而再回復至平衡態，此現象而交流霍爾量測實驗結果吻合，更加確定二維電子系統的表面量子穿隧現象。這些穿隧至表面的電子可進一步屏蔽氧化層與半導體界面的缺陷電荷而降低遠端離子散射效應，進而使量子井內的電子遷移率提升。此外，我們亦發現霍爾樣品的直流臨界電壓會隨著溫度變化，在溫度約為50 K時，臨界電壓會瞬間增加，此現象亦與表面缺陷有關，在本論文中亦會有詳細的介紹與討論。 最後我們研究距離表面不同深度的二維電子樣品之電容電壓關係，我們發現電容-電壓頻率色散現象與距離有關，其原因目前尚不清楚，但我們提出幾種可能的原因並進行討論。

As the sizes of the CMOS transistors are scaled down to the atomic scale, new channel materials, alternative structures, or novel computing devices to continue the scaling rule become important. Quantum computing by spin manipulation is a promising candidate to outperform the conventional logic units by charge manipulation. For solid state quantum computing, the most common baseline structure is a two-dimensional electron gas (2DEG) formed in semiconductor heterostructure. Si/SiGe heterostructures attracts tremendous attentions due to the reduced nuclear spin decoherence and compatibility of Si VLSI technology. Thus, we focus on the transport properties of 2DEG in Si/SiGe heterostructures in this thesis. Hall measurement technique is commonly used for the characterisitcs 2DEG transport. We established a home-made Hall system of varying temperature (4 K ~ 300 K) to investigate the DC and AC characteristics of 2DEGs. We fabricated Hall-bar devices with top gate to modulate the 2DEG density. For the first time, a negative differential resistance in DC characteristics is observed. This is due to the crossover of non-equilibrium and equilibrium in the 2DEG system. At low temperatures, electrons cannot be populated at the surface due to the channel freeze-out. In order to conserve the charges, electrons would be accumulated in the underlying 2DEG channel and surpass the equilibrium density. However, as the gate voltage increases further, the increased 2DEG density enhances the electric-field and the tunneling probability of 2DEG electrons to the surface is also enhanced. The mobility of tunneled electrons at the surface is much lower than that in the 2DEG channel, leading to a lower total conductance and current. By varying the temperature, we found at ~50 K, the threshold voltage of Hall devices increases abruptly, which cannot be explained by the theory of MOSFET. Here we propose a model which involves the defect freeze-out at the surface to explain this phenomenon. Last, we investigated the relationship of capacitance vs. gate voltage for 2DEGs at different depths. An interesting depth dependence of frequency dispersion was observed and possible mechanisms are also discussed in this thesis.