單級交流/直流轉換器之輸出電容縮減

Abstract

本論文致力於縮減單級交流/直流功率因數校正轉換器之輸出電容值，以便達成縮小體積、降低成本、提高功率密度等功能要求。藉由電路架構的改進與控制策略的創新，兩種不同研究方向在本論文中被提出，用以達成相同的輸出電容縮減研究目標。 首先，在電路架構的研究上，本論文提出一個單級改良型非對稱半橋返馳式轉換器 (asymmetrical half-bridge flyback converter, AHBFC)，乃是結合降壓型功率因數校正器、儲能電路與傳統型非對稱半橋返馳式轉換器而成。此改良型AHBFC具有儲能電容，能降低96 %之輸出電容值。在全輸入電壓範圍時，依舊達成穩定的電壓輸出。另外，不需要額外的控制電路，即可達到功率因數趨近於1與低總諧波失真的規範要求。同時保有功率半導體元件零電壓切換與零電流切換的特性，維持電路整體的轉換效率。 在控制策略的研究上，則提出一種創新的前饋電壓控制策略 (feedforward voltage control strategy, FVCS)，使用前饋電壓訊號讓輸入電流產生失真，論文中提供之設計範例能降低40 %之輸出電容值。此控制策略不需要傳統諧波電流注入法之電流感測電路與諧波注入電路，因此可以大量簡化控制電路的複雜度。 本論文中，首先介紹交流/直流功率因數校正轉換器，與減少電容值之現有技術，接著針對提出之轉換器與控制策略，提供詳盡的理論分析、數學推導、設計準則與電腦模擬。最後，分別透過原型電路之硬體實作與實驗結果，驗證本論文所提出之改良型AHBFC與FVCS在全輸入電壓範圍之可行性及其達成輸出電容縮減之功效。

This dissertation aims to reduce the output capacitance for single-stage AC-DC power factor correction (PFC) converters for achieving small size, low cost, and high power density. In order to reduce the output capacitance, this dissertation proposes two approaches, a modified circuit topology and a novel control strategy. Firstly, based on the circuit topology, a modified asymmetrical half-bridge flyback converter (AHBFC) which integrates a buck-type PFC, an energy buffer, and a conventional AHBFC is proposed. Due to the storage capacitor of the modified AHBFC, the required output capacitance can be reduced to 96 % of the rated one. Under universal input voltage range, the converter can still achieve constant output voltage. In addition, without an extra control circuit, the converter can achieve near unity power factor (PF) and low total harmonic distortion (THD). Meantime, the zero-voltage switching (ZVS) and zero-current switching (ZCS) characteristics of the power semiconductor devices can be kept to maintain the overall conversion efficiency of the converter. As for the control strategy, a feedforward voltage control strategy (FVCS) is proposed to distort the input current by utilizing the feedforward voltage signal. For a design example provided in this dissertation, the required output capacitance can be reduced to 40 % of the rated one. Without the required current sense circuit and harmonic injection circuit of the conventional harmonic current injection technique, the complexity of the control circuit can be reduced. In this dissertation, some prior arts for AC-DC PFC converters and capacitance reduction methods are introduced. Then, the detailed theoretical analyses, mathematical derivations, design procedures, and computer simulations for the proposed converter and control strategy are provided. Finally, hardware implementations and experimental results of the prototype circuits are presented to verify the feasibility of the proposed modified AHBFC and FVCS under universal input voltage range and their effectiveness on output capacitance reduction.