利用氟離子電漿處理之增強型氮化鋁鎵/氮化鎵金氧半高電子遷移率電晶體的製作與分析

Abstract

在這篇論文中我們先研究了閘極堀入製程以及在閘極區域氧化層的沉積對氮化鋁鎵/氮化鎵高電子遷移率電晶體在直流特性上的影響，閘極堀入製程和氧化層的沉積會造成電晶體的臨界電壓偏移，也同時會影響關閉狀態的電流與形成介面缺陷，因為磊晶晶圓的品質不佳所以在這章節中沒有深入研究，而是做為製程開發與討論。 為了降低功率損耗，研究主要的方向朝向常關式元件發展，我們使用氟離子為基礎的電漿處理電晶體的閘極區域在不同磊晶結構的晶圓上，製作出增強型高電子遷移率電晶體並與空乏型電晶體特性做比較，臨界電壓可從 -1.3 V 偏移至 0.45 V。 在進一步的為了提高閘極施加偏壓與降低閘極漏電流，我們在氮化鋁鎵/氮化鎵金氧半高電子遷移率電晶體的閘極區域成長10 奈米的氧化鋁作為氧化絕緣層，金屬後熱退火的製程也修復了由氟離子處理造成的表面損傷而使汲極電流密度有 1.5 倍的提升，在電容量測以及不同閘極操作偏壓下分析研究了介面缺陷造成臨界電壓偏移的機制，電流崩陷的現象也經由閘極脈衝的量測下觀察到。

In this thesis, we investigated the effect of gate recess process and oxide layer deposition on DC characteristics of AlGaN/GaN HEMT first. Threshold voltage of AlGaN/GaN HEMTs can be shifted by gate recess process and oxide layer deposition. Gate recess process and oxide layer deposition also affect off state current and surface traps effect. Only for process development and didn’t do further research in this chapter because of poor wafer quality. In order to reduce the loss of switch, the development of normally off GaN FETs is the major direction of research. We using fluoride-based plasma treatment on different epitaxy structures to fabricate enhancement mode HEMTs show a performance compare with the depletion mode HEMTs. Threshold voltage of AlGaN/GaN HEMTs can be shifted from -1.3 V to 0.45 V. We deposited 10 nm Al2O3 as oxide layer of AlGaN/GaN MOSHEMTfor the higher gate voltage applicable and reduce gate leakage current. The damage caused by fluoride treatment can be recovered by post metallization anneal while shows drain current density 1.5 times improvement. We also investigated the engineering of interface traps cause threshold voltage shift under different gate bias operation and CV measurement. Current collapse phenomena are also observed by using gate lag pulse measurement.