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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 呂學士 | |
dc.contributor.author | Jian-Yu Hsieh | en |
dc.contributor.author | 謝建宇 | zh_TW |
dc.date.accessioned | 2021-06-15T13:40:35Z | - |
dc.date.available | 2016-02-15 | |
dc.date.copyright | 2016-02-15 | |
dc.date.issued | 2016 | |
dc.date.submitted | 2016-01-11 | |
dc.identifier.citation | Chapter 1:
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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/51599 | - |
dc.description.abstract | 物聯網(IOT)的議題已經逐漸被重視,範圍在消費性電子產品、居家智慧生活和遙控醫療照護,整合行動通訊和網際網路等系統,物聯網需要低功率的射頻和生醫電路,在本論文中,低功率消耗電路技術被研究用在射頻和生醫電路,射頻電路在傳輸高速資料通常消耗大量的功率,人體的生醫植入電路需要低功率消耗的電路增加使用壽命,才可以減少再次做植入手術的狀況,本論文使用一些技術,電路在低功率消耗的狀態下還有好的能力,本論文設計的電路用在射頻和生醫,射頻電路有2.4 ~ 6 GHz寬頻低雜訊放大器、2.4 GHz循環器和V-band (57.2 ~ 65.8 GHz) 鏡像消除接收機前端電路,生醫電路有MICS-band (402 ~ 405 MHz) OOK/FSK接收機和10 MHz電解氣泡推動之無線給電遙控移動晶片。
2.4 ~ 6 GHz寬頻低雜訊放大器使用LC負載再利用的技術達成寬頻,再使用高線性度技術讓電路保持好的線性度(IIP3),IIP3是-3.9 ~ -1.9 dBm。2.4 GHz循環器使用電流再利用和可調整訊號消除技術達成了低功率、高發射器接收器隔離度和小晶片面積,隔離度是68 dB,功率消耗是1.5 mW,晶片面積是0.62 mm2。V-band前端電路使用高速自動喚醒和增益控制技術,若沒有無線訊號電路休息,功率消耗是19 mW,若有無線訊號會自動喚醒電路,功率消耗是46 mW,若無線訊號振幅過大自動調整增益和輸入線性度(IP1dB),IP1dB是-22.5 ~ -25.2 dBm,電路使用小晶片面積的被動相位移耦合器和混頻器實現鏡像消除,鏡像消除率是32 dB,晶片面積是0.82 mm2。MICS-band OOK/FSK接收機使用自動喚醒、線性度、次諧波混頻和低截止電壓技術,電路休息的功率消耗是129 μW,電路喚醒的功率消耗是352 μW。10 MHz電解氣泡推動之無線給電遙控移動晶片可以在人體中移動,利用無線給電提供能量控制晶片,電解的氣泡可以讓晶片在電解液移動速率是 0.3 mm/s,功率消耗是207.4 μW和180 μW。 | zh_TW |
dc.description.abstract | Recently, internet of things (IOT), including consumer electronics, smart home, and telemedicine, is important. IOT integrating communications and internets needs low-power radio-frequency (RF) and biomedical products. In this dissertation, several low-power techniques have been developed for RF and biomedical circuits for extending enough battery life. And degrading circuit performances resulting from the low-power techniques have also been resolved in the following sections. The RF circuits include a 2.4 ~ 6 GHz wideband low-noise amplifier (LNA), a 2.4 GHz quasi-circulator, and a V-band (57.2 ~ 65.8 GHz) image-reject receiver front-end. The biomedical circuits include a MICS-band (402 ~ 405 MHz) OOK/FSK receiver, and a 10-MHz remotely-controlled locomotive IC driven by electrolytic bubbles and wireless powering.
The LNA uses the LC load-reusing and multiple-gated techniques with IIP3 of -3.9 ~ -1.9 dBm and a power consumption of 6 mW. The quasi-circulator uses a current-reuse technique and adjustable signal cancellation. The measured isolation from transmitter to receiver, |S31|, is 68 dB with a power consumption of 1.5 mW and a chip size of 0.62 mm2. The V-band receiver front-end with high-speed auto wake-up and gain controls varies power consumptions depending on the input RF signal power. The measured power consumptions are 19 mW and 46mW, respectively. IP1dB also can be adjusted between −25.2 dBm and −22.5 dBm. The measured image-reject ratio (IRR) is greater than 32 dB. The chip size is 0.82 mm2. The MICS-band OOK-FSK receiver uses wake-up, multiple-gated, subharmonic-mixing, and body-forward-biasing techniques with measured power consumptions of 129 μW and 352 μW, respectively. The locomotive IC can move on electrolyte with a speed up to 0.3 mm/s with power consumption of 207.4 μW and 180μW, respectively. | en |
dc.description.provenance | Made available in DSpace on 2021-06-15T13:40:35Z (GMT). No. of bitstreams: 1 ntu-105-D99943020-1.pdf: 6856793 bytes, checksum: 19f342e3185239f19804e3c65281fb26 (MD5) Previous issue date: 2016 | en |
dc.description.tableofcontents | Table of Contents
Chapter 1. Introduction 1 1.1 Motivation 1 1.2 Wireless Network 3 1.3 Physiological monitoring 4 1.4 Low-Power Techniques 5 1.5 Dissertation Organization 5 Chapter 2. Wideband Low Noise Amplifier by LC Load-reusing Technique 6 2.1 Introduction 6 2.2 Design Concept 6 2.3 Measurement Results of the LNA 10 2.4 Conclusion 12 Chapter 3. A 1.5-mW, 2.4-GHz Quasi-Circulator with High Transmitter-to-Receiver Isolation in CMOS Technology 13 3.1 Introduction 13 3.2 Circuit Design 14 3.3 Measurement Results of the Quasi-Circulator 16 3.4 Conclusion 20 Chapter 4. A 90-nm CMOS V-Band Low-Power Image-Reject Receiver Front-End with High-Speed Auto-Wake-up and Gain Controls 21 4.1 Introduction 21 4.2 Architecture Overview 23 4.2.1 Image Problem and Image-Reject Architectures 24 4.2.2 On-Chip Lumped-Element Phase-Shift Couplers 26 4.2.3 Rectifier 29 4.2.4 WGU 32 4.2.5 VGLNA and Mixer 33 4.3 Theoretical Analyses and Design Consideration 35 4.3.1 Time Delay in the Zero-VT Envelope Detector 35 4.3.2 Time Delay in the Limiting Amplifier 37 4.4 Measurement Results of the Receiver Front-End 39 4.5 Conclusion 43 Chapter 5. A 0.45-V Low-Power OOK/FSK RF Receiver in 0.18 μm CMOS Technology for Implantable Medical Applications 44 5.1 Introduction 44 5.2 Receiver Architecture 45 5.2.1 Forward Body Biasing 46 5.2.2 Multiple-Gated Low-Noise Amplifier 47 5.2.3 Folded Semi-Passive Subharmonic Mixer 48 5.2.4 Wake-Up Circuit 49 5.2.5 Variable-Gain Amplifier 50 5.2.6 Dual-Mode Demodulator 51 5.3 Measurement Results of the Receiver 53 5.4 Conclusion 58 Chapter 6. A Remotely-Controlled Locomotive IC Driven by Electrolytic Bubbles and Wireless Powering 59 6.1 Introduction 59 6.2 System Architecture 61 6.2.1 Electrolysis Electrode 62 6.2.2 On-Chip Coil 64 6.2.3 Rectifier and Regulator 66 6.2.4 ASK Demodulator 67 6.2.5 Clock Regenerator and POR Circuit 68 6.2.6 MCU 70 6.2.7 Electrode Driving Circuit 72 6.2.8 Design Concept and Biomedical Consideration 73 6.3 Measurement Results of the Locomotive IC 74 6.4 Conclusion 83 Chapter 7. Conclusion 84 References: 86 List of Figures Fig. 1.1.1. Internet of things 2 Fig. 1.1.2. (a) A capsule endoscope, (b) a pacemaker, and (c) a neurostimulator 3 Fig. 2.2.1. The schematic of the proposed LNA 8 Fig. 2.2.2. Derivation of the LC load-reusing technique 8 Fig. 2.2.3. The dependence of S11 on the gate inductance and LC load impedances 9 Fig. 2.3.1. Measured S11, S22 and S21 of the LNA 11 Fig. 2.3.2. Measured NF and IIP3 of the LNA 11 Fig. 3.1.1. Signal flows in a circulator 14 Fig. 3.2.1. A circuit schematic of the proposed active quasi-circulator 16 Fig. 3.3.1. A die micrograph of the proposed active quasi-circulator 17 Fig. 3.3.2. The measured return losses and insertion losses of the active quasi-circulator 18 Fig. 3.3.3. The results of measured transmitter-to-receiver isolations with magnitude adjustment (Vctrl = 0.55 V – 0.65 V) 18 Fig. 3.3.4. The simulated and measured results of the other port-to-port isolations of the active quasi-circulator 19 Fig. 3.3.5. The measured input compression points from transmitter to antenna and from antenna to receiver 19 Fig. 4.1.1. Block diagram of the proposed receiver front-end 23 Fig. 4.2.1. Image signal mixing behavior in a receiver front-end 24 Fig. 4.2.2. Proposed architectures for image rejection 25 Fig. 4.2.3. (a) Coupled-line coupler and (b) branch-line ring hybrid (or rat-race hybrid) replaced by the lumped inductors and capacitors 28 Fig. 4.2.4. Schematic of the proposed rectifier 30 Fig. 4.2.5. Schematic diagram of a conventional envelope detector 30 Fig. 4.2.6. Schematic diagrams of (a) the zero-VT envelope detector and (b) its equivalent circuit 31 Fig. 4.2.7. The (a) charging and (b) discharging behaviors of the zero-VT envelope detector 31 Fig. 4.2.8. Schematic of the proposed wake-up and gain control circuit 32 Fig. 4.2.9. Schematic of the proposed VGLNA 33 Fig. 4.2.10. Time delay TD phenomenon while the VGLNA is activated and shut down by the command of the SWU 34 Fig. 4.2.11. Schematic of the proposed mixer 35 Fig. 4.3.1. Charging and discharging time domain behaviors of the zero-VT envelope detector at points P1 and P2 37 Fig. 4.4.1. Chip micrograph of the receiver front-end 40 Fig. 4.4.2. Measured wake-up transient responses of SWU and IF signals 40 Fig. 4.4.3. Measured CG and IRR of the SRLNA 41 Fig. 4.4.4. Measured NF of the receiver front-end 41 Fig. 4.4.5. Measured IIP3 of the receiver front-end in (a) high-gain and (b) low-gain modes at 5 GHz IF output signal 42 Fig. 5.2.1. The block diagram of the proposed receiver 46 Fig. 5.2.2. Schematic of the proposed MGLNA 48 Fig. 5.2.3. The schematic of the FSPSM 49 Fig. 5.2.4. The schematic of the WUC 50 Fig. 5.2.5. The schematic of the VGA 51 Fig. 5.2.6. (a) The schematic and (b) the mechanism of the DMD 52 Fig. 5.3.1. The chip micrograph 54 Fig. 5.3.2. The measured input return loss S11 54 Fig. 5.3.3. The measured result of IIP3 of the MGLNA and FSPSM 55 Fig. 5.3.4. The measured wake-up behavior of the WUC 55 Fig. 5.3.5. The measured results of (a) OOK and (b) FSK demodulations 56 Fig. 5.3.6. The measured result of BERs and sensitivities of OOK and FSK Modulations 57 Fig. 6.1.1. Schematic of the proposed remotely-controlled locomotive CMOS IC 60 Fig. 6.2.1. The system block diagram of the proposed CMOS locomotive IC 62 Fig. 6.2.2. The layout of the electrolysis electrode 63 Fig. 6.2.3. Measured transient response of generated bubble volume and its corresponding recorded images 63 Fig. 6.2.4. The inductive coupling from the external transmitter to the locomotive IC 65 Fig. 6.2.5. The layout and inductive coupling scenario of the proposed on-chip coil 66 Fig. 6.2.6. The schematic of the proposed power rectifier and regulator 67 Fig. 6.2.7. The schematic of the proposed ASK demodulator 68 Fig. 6.2.8. The schematic of the proposed clock regenerator 69 Fig. 6.2.9. The schematic of the proposed POR circuit 70 Fig. 6.2.10. Schematic diagram of the MCU 71 Fig. 6.2.11. The functions of the dynamic and voting samplings 72 Fig. 6.2.12. The RS232 command packet format of direction and speed controls of the IC 72 Fig. 6.2.13. The schematic of the proposed electrode driving circuit 73 Fig. 6.3.1. A chip micrograph of the proposed locomotive IC 77 Fig. 6.3.2. The measurement setup for (a) circuit and (b) locomotive functions of the chip 78 Fig. 6.3.3. The theoretical efficiencies obtained from (6.2.1) and (6.2.2) and measured results from the external coil to on-chip coil 78 Fig. 6.3.4. The measured voltages of the electrolysis electrodes EP0, EP1, EP2 and EP3 based on different RS232 commands 79 Fig. 6.3.5. Pictures of the chip movement with red dots marking the cruising track. The moving distance is 1.8cm in 60 seconds, indicating a moving speed up to 0.3mm/sec. Substrate polishing is used to reduce the mass of the chip for higher moving speed 79 Fig. 6.3.6. Pictures of the chip movement with red dots marking the cruising track. The chip changes moving direction while the RS232 direction command changes at T = 10 sec 80 Fig. 6.3.7. The bridge rectifier is replaced by a charge pump rectifier and a voltage limiter in the modified chip 80 Fig. 6.3.8. The measured supply voltage VDD and demodulated command DO of the modified IC while the ASK modulated RF signal inputs random data 81 Fig. 6.3.9. The measured voltages of the electrolysis electrodes EP0, EP1, EP2 and EP3 of the modified IC based on different RS232 commands 81 List of Tables Table 1.2.1. Performance Summary of Communication Protocols 4 Table 2.3.1 Performance Summary of the LNA 12 Table 3.3.1 Performance Comparison of State-of-the-Art Quasi-Circulators 20 Table 4.2.1 The Parameters of the Lumped-Element Phase-Shift Couplers 28 Table 4.4.1 Performance Comparison of State-of-the-Art V-Band Receiver Front-End 43 Table 5.3.1 Performance Comparison of MICS-Band RF Receivers 57 Table 6.2.1 The Element Parameters of the External and On-Chip Coils 66 Table 6.3.1 Performance Comparison of State-of-the-Art Locomotive Chips 82 | |
dc.language.iso | en | |
dc.title | CMOS射頻與生醫系統電路 | zh_TW |
dc.title | CMOS Radio-Frequency and Biomedical SoCs | en |
dc.type | Thesis | |
dc.date.schoolyear | 104-1 | |
dc.description.degree | 博士 | |
dc.contributor.oralexamcommittee | 孫台平,楊燿州,孟慶宗,林致廷,林木鍊 | |
dc.subject.keyword | 寬頻低雜訊放大器,循環器,鏡像消除接收機前端電路,OOK/FSK接收機,電解氣泡推動之無線給電遙控移動晶片, | zh_TW |
dc.subject.keyword | Wideband LNA,quasi-circulator,image-reject receiver front-end,OOK/FSK receiver,remotely-controlled locomotive IC driven by electrolytic bubbles and wireless powering, | en |
dc.relation.page | 98 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2016-01-11 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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