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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 黃天偉(Tian-Wei Huang) | |
dc.contributor.author | Wei-Heng Lin | en |
dc.contributor.author | 林煒恆 | zh_TW |
dc.date.accessioned | 2021-05-15T17:50:29Z | - |
dc.date.available | 2019-07-10 | |
dc.date.available | 2021-05-15T17:50:29Z | - |
dc.date.copyright | 2014-09-02 | |
dc.date.issued | 2014 | |
dc.date.submitted | 2014-08-20 | |
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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/4939 | - |
dc.description.abstract | 本論文目的主要是討論利用台積電先進的65奈米互補式金氧半場效電晶體製程,設計E頻段高頻譜效率的次諧波直接昇頻發射器。首先針對多種在射頻發射鏈路傳輸的非理想效應,進行介紹與討論。為了改善上述非理想效應,我們透過對調變器負載的敏感度分析,設計一個在本地振盪器端寬頻帶低幅度與低相位失衡的45°功率分配器,提供高階正交振幅調變訊號所需的高鏡像抑制機制。並藉由雙平衡次諧波吉伯特混頻器具有良好隔離度的特性,使用65奈米互補式金氧半場效電晶體製程,實現一個寬頻帶高鏡像抑制的IQ調變器。此調變器在55至85 GHz頻寬下,提供0±1 dB轉換增益。此外從64到84 GHz,提供寬頻優於40 dBc的高鏡像抑制。
為了進一步驗證高速數位訊號調變的效能,我們設計高效率高增益四級功率放大器作為60 GHz高鏡像抑制的IQ調變器輸出級,以提高發射器的動態範圍。該發射器在54至70 GHz能提供33 ± 0.5 dB增益。以及在114毫瓦的總直流功率消耗下,有11-dBm的飽和輸出功率。發射器能在1.7%誤差向量幅度之下,以500 Mb/s傳輸速率發射1024-正交振幅調變信號。藉由本論文所提出的討論與分析,所設計的60 GHz高鏡像抑制發射器,其頻譜應用效率可以被進一步提升。 | zh_TW |
dc.description.abstract | The main purpose of this dissertation is to design the E-band high spectral efficiency direct-conversion modulator and transmitter using TSMC 65-nm CMOS technology. First, the non-ideal effects on the RF transmitter are introduced and discussed. For high-order modulation scheme implementation, the RF impairments are mainly related to the non-linearity and in-phase/quadrature (IQ) imbalance. To maintain high image rejection ratio (low IQ imbalance) of the IQ modulator over a wide bandwidth, a load insensitive analysis and an local oscillator (LO) broadband 45° power splitter are proposed to achieve low amplitude and phase imbalanced structure. In addition, the doubly balanced sub-harmonic Gilbert-cell mixer with the advantages of good LO leakage suppression has been selected in the mixer design. The IQ modulator demonstrates a measured flat conversion gain of 0 ± 1 dB from 55 to 85 GHz. The image rejection ratio is better than 40 dBc from 64 to 84 GHz.
For the high speed digital modulation quality demonstration, the IQ modulator is integrated with a four-stage high gain high efficiency power amplifier (PA) to form a direct-conversion transmitter. The measured conversion gain of the transmitter is 33 ± 0.5 dB from 54 to 70 GHz. The saturated power is 11 dBm with total dc power consumption of 114 mW. A 1024-QAM modulated signal with a data rate of 500 Mb/s and 1.7% error vector magnitude (EVM) is successfully demonstrated at 65 GHz. Through the characteristics of high image rejection and the superior LO signal suppression, the system capacity of proposed 60-GHz direct-conversion transmitter can be further improved. | en |
dc.description.provenance | Made available in DSpace on 2021-05-15T17:50:29Z (GMT). No. of bitstreams: 1 ntu-103-F95942069-1.pdf: 6860750 bytes, checksum: 23ce6b83eeceb46446e1440bf5cc868e (MD5) Previous issue date: 2014 | en |
dc.description.tableofcontents | 口試委員會審定書 #
誌謝 i 摘要 ii ABSTRACT iii CONTENTS iv LIST OF FIGURES vi LIST OF TABLES xi Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Literature Survey 2 1.3 Contributions 4 1.4 Organization of this Dissertation 6 Chapter 2 High Image Rejection E-band Sub-Harmonic IQ-Modulator in 65-nm CMOS Process 7 2.1 Introduction 7 2.1.1 Error Vector Magnitude 7 2.1.2 IQ Imbalance and Image Rejection Ratio 8 2.2 IQ compensation techniques 12 2.3 Circuit Design 15 2.3.1 Sub-harmonic Gilbert-Cell Mixer with Built-in LO buffer Design 15 2.3.2 Load Sensitivity Analysis for Sub-harmonic IQ Modulator Design 22 2.3.3 Broadband LO 45° Power Splitter with Amplitude and Phase Compensation 27 2.3.4 IQ Modulator Design 36 2.4 Experimental Results 41 2.4.1 Full E-band High Image Rejection Modulator Characteristic 41 Chapter 3 CMOS 60-GHz Front-End Amplifiers 48 3.1 A 57-66 GHz 12.9-dBm Miniature Power Amplifier with 23.4% PAE in 65-nm CMOS 49 3.1.1 Introduction 49 3.1.2 Device Characteristic and MMIC Process 50 3.1.3 Circuit Design 50 3.1.4 High Efficiency Power Amplifier Characteristic 56 3.2 A 0.6-V 60-GHz Low-Power LNA with Forward Body Bias Technique in 90 nm CMOS Process 61 3.2.1 Introduction 61 3.2.2 Device Characteristic and MMIC Process 62 3.2.3 Circuit Design 63 3.2.4 Experimental Results 65 Chapter 4 1024 QAM 60-GHz IQ Transmitter in 65-nm CMOS Process 71 4.1 Introduction 71 4.2 Circuit Design 72 4.3 1024 QAM 60-GHz Transmitter Characteristic 76 Chapter 5 Conclusion 88 Reference 90 Publications List 98 | |
dc.language.iso | en | |
dc.title | 毫米波E頻段高頻譜效率互補式金氧半導體發射器之研究 | zh_TW |
dc.title | E-band CMOS Transmitter Design for High Spectral Efficiency
Wireless Communications | en |
dc.type | Thesis | |
dc.date.schoolyear | 102-2 | |
dc.description.degree | 博士 | |
dc.contributor.oralexamcommittee | 王暉(Huei Wang),張志揚(Chi-Yang Chang),邱煥凱(Hwann-Kaeo Chiou),張鴻埜(Hong-Yeh Chang),蔡作敏(Zuo-Min Tsai) | |
dc.subject.keyword | 毫米波,互補式金氧半場效電晶體,鏡像抑制,1024-正交振幅調變,次諧波混波器, | zh_TW |
dc.subject.keyword | Millimeter-wave (MMW),CMOS,image rejection ratio (IRR),1024-QAM,sub-harmonic mixer., | en |
dc.relation.page | 99 | |
dc.rights.note | 同意授權(全球公開) | |
dc.date.accepted | 2014-08-20 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
顯示於系所單位: | 電信工程學研究所 |
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