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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/4831完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 陳中平 | |
| dc.contributor.author | Yu-Hsiang Chiu | en |
| dc.contributor.author | 邱煜翔 | zh_TW |
| dc.date.accessioned | 2021-05-14T17:48:16Z | - |
| dc.date.available | 2015-10-13 | |
| dc.date.available | 2021-05-14T17:48:16Z | - |
| dc.date.copyright | 2015-10-13 | |
| dc.date.issued | 2015 | |
| dc.date.submitted | 2015-09-25 | |
| dc.identifier.citation | [1] Chin-Khai Tang, Ming-Shing Su, and Yi-Chang Lu, “LineDiff Entropy: Lossless
Layout Data Compression Scheme for Maskless Lithography Systems,” IEEE Signal Processing Letters, Vol. 20, No. 7, July 2013, pp. 645-648. [2] P. Petric, C. Bevis, A. Brodie, A. Carroll, A. Cheung, L. Grella, M. McCord, H. Percy, K. Standiford, and M. Zywno, “REBL nanowriter: Reflective Electron Beam Lithography,” Proc. SPIE, vol. 7271, Alternative Lithographic Technologies, 727107, Mar. 2009, doi: 10.1117/12.817319. [3] Ming-Shing Sua, Kuen-Yu Tsaia, Yi-Chang Lua, Yu-Hsuan Kuoa, Ting-Hang Peia, and Jia-Yush Yenb, “Architecture for next generation massively parallel maskless lithography system (MPML2),” Proc. SPIE, Vol. 7637, Alternative Lithographic Technologies II, 76371Q, Apr. 2010, doi: 10.1117/12.846444. [4] V. Dai, “Data Compression for Maskless Lithography Systems: Architecture, Algorithms and Implementation,” Ph.D. dissertation, University of California, Dept. Electrical Engineering Computer Science, Berkeley, CA, USA, 2008. [5] Jeehong Yang, “Lossless Circuit Layout Image Compression Algorithm for Multiple Electron Beam Direct Write Lithography Systems,” Ph.D. dissertation, University of Michigan, 2012. [6] Cheng-Chi Wu, Jensen Yang, Wen-Chuan Wang, Shy-Jay Lin, “An Instruction-based High-Throughput Lossless Decompression Algorithm for E-Beam Direct-Write System,” Proc. SPIE, vol. 9423, Alternative Lithographic Technologies VII, 94231P, Mar. 2015, doi: 10.1117/12.2085278. [7] Jacob Ziv, Abraham Lempel, 'A Universal Algorithm for Sequential Data Compression'. IEEE Transaction on Information Theory, Vol. IT-23, No. 3, May 1977, pp. 337-343. [8] Laung-Terng Wang, Yao-Wen Chang, and Kwang-Ting Cheng, “Electronic Design Automation: Synthesis, Verification, and Test (Systems on Silicon),” 1st Edition, Elsevier Inc., 2009, Chapter 12, pp. 687-749. [9] Lee, C.Y., and Whippany, N. J., “An Algorithm for Path Connections and Its Applications,” IEEE IRE Transactions on Electronic Computers, Vol. EC-10, No. 3, Sept. 1961, pp. 346-365. [10] Peter E. Hart, Nils J. Nilsson, Bertram Raphael, “A Formal Basis for the Heuristic Determination of Minimum Cost Paths,” IEEE Transactions on Systems Science and Cybernetics, Vol. 4, No. 2, July, 1968, pp. 100-107. [11] Minsik Cho, Yongchan Ban, and David Z. Pan, “Double Patterning Technology Friendly Detailed Routing,” in IEEE/ACM International Conference on Computer-Aided Design, 2008, pp. 506-511. [12] Shao-Yun Fang, “Lithography Optimization for Sub-22 Nanometer Technologies,” Ph.D. dissertation, National Taiwan University, Graduate Institute of Electronics Engineering, Taipei, Taiwan, 2013. [13] Jhih-Rong Gao, and David Z. Pan, “Flexible self-aligned double patterning aware detailed routing with prescribed layout planning,” Proceedings of the ACM international symposium on International Symposium on Physical Design, 2012, pp. 25-32. [14] Soukup, J., “Fast Maze Router,” 15th Design Automation Conference, 1978, pp. 100-102. [15] Akers, Sheldon B., “A Modification of Lee’s Path Connection Algorithm,” IEEE Transactions on Electronic Computers, Vol. EC-16, No. 1, Feb., 1967, pp. 97-98. [16] 2013 International Technology Roadmap for Semiconductors: http://www.itrs.net/ [17] S.-Y. Lee and B. D. Cook, “PYRAMID-A Hierarchical, Rule-Based Approach Toward Proximity Effect Correction-Part I: Exposure Estimation,” IEEE Transactions on Semiconductor Manufacturing, Vol.11, No. 1, 1998, pp. 108-116. [18] Shy-Jay Lin, Pei-Yi Liu, Cheng-Hung Chen, Wen-Chuan Wang, Jaw-Jung Shin, Burn J. Lin, “Influence of Data Volume and EPC on Process Window in Massively Parallel E-Beam Direct Write,” Proc. SPIE, vol. 8680, Alternative Lithographic Technologies V, 86801C,March, 2013, doi: 10.1117/12.2010865. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/4831 | - |
| dc.description.abstract | 由於製程的演進，超大型積體電路的最小關鍵尺寸已趨近於物理極限，而傳
統光學曝光所使用之光源因其解析度而逐漸不敷使用，電子束曝光則因其高度的 精準特性而成為極具潛力的次世代製程選擇。 電子束的精準程度可以達到奈米量級，在使用上必須非常精確的將電路資訊 傳輸至曝光系統。而現今的超大型積體電路複雜程度與日俱增，製程上若欲讓電 子束機臺得以即時曝光顯影生產，就必須仰賴極有效率的資料傳輸方式，將電路 資料即時傳輸至機臺上，此傳輸規格超越了現今光纖傳輸所能達到的極限。因此 實際在工業上的使用，必須先將電路的資訊壓縮以後再傳輸，至機臺上解壓縮， 才能達到預期的產率。 本篇論文將要探討的問題是，若已經選擇了特定的壓縮演算法，是否能夠在 電路實體設計的階段，就產生出能夠讓此壓縮演算法表現得更加優異的電路布 局，進而提升整體的壓縮效率。而實驗的結果證明了此一理論，也同時說明了由 繞線階段便加以考量，進而影響資料壓縮的效果是不容忽視的。此一領域亦極具 發展的潛力與研究價值。 | zh_TW |
| dc.description.abstract | The feature size of Integrated Circuits(IC) are shrinking down along with the
advancement of technology, but the resolution of the ArF laser is far from the target for next generation lithography. Electron beam (E-beam) lithography, with its high-accuracy characteristic, is very likely to become the main role in next generation lithography. Because of the accuracy of E-beam, the exact information of the circuit has to be delivered to the E-beam emitter. However, circuits nowadays has become so complicated that the successfulness of this process relies on the speed of data transmission, which is not sufficiently fast even with technologies today. So in practice, data should be compressed first, transmitted by optic fibers, and then decompressed in the E-beam machines. In this thesis, we proposed a detailed routing method to improve data compression quality before applying the actual compression algorithm. The results of experiments show that, with one particular data compression algorithm, LineDiff Entropy, chosen, we improve data compression ratio with our proposed detailed router. And we can conclude that considering data compression ratio in physical design phase is a field worth studying. | en |
| dc.description.provenance | Made available in DSpace on 2021-05-14T17:48:16Z (GMT). No. of bitstreams: 1 ntu-104-R02943148-1.pdf: 2755793 bytes, checksum: 85585791514c3f8dfa92f34fba8340a1 (MD5) Previous issue date: 2015 | en |
| dc.description.tableofcontents | 口試委員審定書 ................................................................................................................i
誌謝 ................................................................................................................................. ii 中文摘要 ......................................................................................................................... iii ABSTRACT .....................................................................................................................iv CONTENTS ...................................................................................................................... v LIST OF FIGURES ........................................................................................................ vii LIST OF TABLES ............................................................................................................ix Chapter 1 Introduction .............................................................................................. 1 1.1 MEBDW Systems Difficulty .......................................................................... 2 1.2 Motivation and Accomplishment .................................................................... 5 1.3 Organization ................................................................................................... 6 Chapter 2 Preliminaries ............................................................................................ 8 2.1 MEBDW System Architecture Designs .......................................................... 8 2.2 Data Compression Algorithms ...................................................................... 11 2.2.1 Introduction of data compression algorithms ...................................... 11 2.2.2 LineDiff Entropy ................................................................................. 14 2.3 Routing Algorithms ...................................................................................... 17 2.3.1 Lee’s Algorithm ................................................................................... 19 2.3.2 A* search Algorithm ........................................................................... 21 Chapter 3 Data Compression Ratio-aware Detailed Routing .............................. 24 3.1 Routing Specifications .................................................................................. 24 3.2 1st strategy: on-grid wires ............................................................................. 25 3.3 2nd strategy: simple route .............................................................................. 28 3.4 3rd strategy: desired patterns ......................................................................... 30 Chapter 4 Results of Experiments .......................................................................... 35 Chapter 5 Conclusion and Future Work................................................................ 48 REFERENCE .................................................................................................................. 50 | |
| dc.language.iso | en | |
| dc.subject | 繞線 | zh_TW |
| dc.subject | 電子束曝光 | zh_TW |
| dc.subject | 資料壓縮 | zh_TW |
| dc.subject | 實體設計 | zh_TW |
| dc.subject | 電路布局 | zh_TW |
| dc.subject | Data Compression Algorithm | en |
| dc.subject | Detailed Routing | en |
| dc.subject | Physical Design | en |
| dc.subject | Lithography | en |
| dc.subject | Electron Beam | en |
| dc.title | 針對多電子束直寫系統資料壓縮比例之細部繞線 | zh_TW |
| dc.title | Data Compression Ratio-aware Detailed Routing for Multiple E-Beam Direct Write Systems | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 104-1 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 方劭云,陳少傑,盧奕璋 | |
| dc.subject.keyword | 電子束曝光,資料壓縮,實體設計,電路布局,繞線, | zh_TW |
| dc.subject.keyword | Lithography,Electron Beam,Data Compression Algorithm,Physical Design,Detailed Routing, | en |
| dc.relation.page | 52 | |
| dc.rights.note | 同意授權(全球公開) | |
| dc.date.accepted | 2015-09-26 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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