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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/47838完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 張家歐(Chia-Ou Chang) | |
| dc.contributor.author | Chung-Han Lin | en |
| dc.contributor.author | 林忠翰 | zh_TW |
| dc.date.accessioned | 2021-06-15T06:21:37Z | - |
| dc.date.available | 2010-08-18 | |
| dc.date.copyright | 2010-08-18 | |
| dc.date.issued | 2010 | |
| dc.date.submitted | 2010-08-09 | |
| dc.identifier.citation | [1] 楊龍杰, 認識微機電, 滄海出版社, 民國90年.
[2] B.Mihang, W.Weiyuan, “Future of microelectromechanical systems(MEMS),” Sensors and Actuators, A56, pp.135-141, 1996. [3] M.A. LEMKIN et al, “A 3-axis force balanced accelerometer using a single proof-mass,” Solid State Sensors and Actuators, Vol. 2, pp.1185-1188, 1997. [4]Analog Device ADXL210 accelerometer datasheet. http://www.analog.com/pdf/ADXL202_10_b.pdf. [5]Navid Yazdi,Farrokh ayazi, and Khalil Najafi, “ Micromachined Inertial sensor,”Proc.of the IEEE.Aug.1998,pp1640-1659 [6] B. E. Boser and R. T. Howe,“Surface Micromachined Accelerometer, ”IEEE Journal of Solid-State Circuits, Vol. 31, pp. 366-375, 1996. [7] M. Kraft, C. Lewis, T. Hesketh and S. Szymkowiak, “A novel micromachined accelerometer capacitive interface,” Sensors and Actuators A68 ,pp. 466-473, 1998. [8] F.N. Alavi, M. Kraft and D.O. King, “ Sensitivity analysis of a high performance accelerometer,” Proc. Conf. on Micromechanics Europe,pp. 305-308, 2001. [9] Analog Devices, “ ADXL-Monolithic Accelerometer with signal conditioning,’’ Datasheet, One Technology Way, Norwood, MA02062,1993. [10] B. E. Boser and R. T. Howe, “Surface Micromachined Accelerometer,” IEEE Journal of Solid-State Circuits, Vol. 31, No. 3, 1996. [11] Bernhard E. Boser, ”Capacitive Position Sense Circuit”, Berkeley Sensor & Actuator Center, Dept. of Electrical Engineering and Computer Sciences University of California, 1996. [12] Bernhard E. Boser, ”Electronics for Micromachined Inertial Sensor”, Berkeley Sensor & Actuator Center, Dept. of Electrical Engineering and Computer Sciences University of California, 1997. [13] Zsolt Kádár, “ Integrated Resonant Magnetic Field Sensor,” Delft Univ., Ph.D. Dissertation, 1997. [14] Naiyavudhi Wongkomet, ”Position sensing for Electrostatic Micropositioners, Dept. of Electrical Engineering and Computer Sciences University of California,1998. [15]鍾啟晨, “The design of micro-capacitive sensing circuit for inertial sensor,” 國立清華大學微機電系統工程研究所,碩士論文,2003. [16]毛志強, “The Design, Simulation and Fabrication of Differential Capacitive Sensing Circuits of Micro Gyroscope,” 國立交通大學電機與控制工程研究所,碩士論文,2004. [17] 陳世昌 , “位移電容感測器之研究設計”, 國立台灣大學應用力學研究所, 碩士論文, 2006. [18] Farrokh Ayazi, Khalil Najafi, “ A HARPSS Polysilicon Vibrating Ring Gyroscope”, IEEE Journal of MEMS, Vol. 10, No. 2, Jun 2001. [19] 張家歐, 周傳心, 張簡文添, “微型陀螺儀研製(二),” 中山科學研究院委託合作研究計畫期末報告,2004. [20] CIC訓練課程 , “Full-Custom Layout Editor with Laker” , 國研院國家片系統設計中心. [21] CIC訓練課程 , “Circuit Simulation and Analysis with HSPICE” , 國研院國家片系統設計中心. [22] CIC訓練課程 , “Full-Custom IC Design Concepts” , 國研院國家片系統設計中心. [23] Dan Clein,“CMOS IC Layout: Concepts, Methodologies, and Tools”, Newnes. [24] Johns Martin, ”Ana[6] B. E. Boser and R. T. Howe,“Surface Micromachined [25] Alan Hastings,“The Art of Analog Layout”, Pearson International. [26] 黃韋皓 , “電容感測電路之設計模擬與佈線”, 國立台灣大學應用力學研究所, 碩士論文, 2007. [27] Behazd Razavi,“Design of Analog CMOS Integrated Circuits”, McGraw-Hill. [28] 吳嘉靖 , “CMOS位移電容感測電路之電路設計”, 國立台灣大學應用力學研究所, 碩士論文, 2008. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/47838 | - |
| dc.description.abstract | 本論文的目的分成四個部分,1.以HSPICE模擬設計CMOS電容感測器2.將設計的CMOS電容感測器加以佈局並委託由台灣積體電路公司下線3.測試晶片並將其量測結果與設計相比較4.一旦發現錯誤的部分,嘗試修正或改進CMOS電容感測器電路以確認其性能達到要求。
本論文使用國家晶片系統設計中心(NSC Chip Implementation Center, CIC)所提供的台灣積體電路(TSMC)0.35μm Mixed-Signal 2P4M Polycide 3.3/5V的製程,並使用Synopsys 公司所出的Hspice電路模擬軟體[21]與思源公司的laker軟體[20]進行模擬及佈線。 | zh_TW |
| dc.description.abstract | The purposes of this dissertation are four-folds: 1. design the CMOS capacitive sensor with HSPICE simulation, 2. Layout the designed CMOS circuit and tape out it through TSMC company, 3. Test and compare the performances of the CMOS chip with those of original design, 4. once the incorrect performances are found, try to correct or improve the design of the CMOS circuit to ensure the performances of the CMOS chip reaching the design requirement.
The dissertation uses 0.35μm Mixed-Signal 2P4M Polycide 3.3/5Vmanufacture process of TSMC which is provided by NSC Chip Implementation Center. Also the Hspice software designed by Synopsys co. is used to simulate the designed circuit, and the Laker software designed by Springsoft co. is adopted to layout the CMOS chip. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-15T06:21:37Z (GMT). No. of bitstreams: 1 ntu-99-R97543017-1.pdf: 4388416 bytes, checksum: b74bb3a8297f31cd23ef66a5a87eebaa (MD5) Previous issue date: 2010 | en |
| dc.description.tableofcontents | 摘要 I
Abstract II 目錄 III 圖目錄 V 表目錄 IX 第一章 導論 1 1.1 研究背景 1 1.2 研究動機與目的 2 1.3 文獻回顧 3 1.4 本文目的與章節摘要 8 第二章 環形陀螺儀之振動原理與分析 10 2.1 環形陀螺儀之原理簡介 10 2.2 環狀陀螺儀感測原理 12 2.3 環形陀螺儀架構與電容值計算 12 2.4 本論文架構電容值的估算 14 第三章 IC設計佈局流程 16 3.1 IC設計流程 16 3.2 IC佈局流程 17 3.3 電晶體佈局設計 18 3.4 佈局圖設計之考量要素 20 第四章 電路架構與運算放大器佈局模擬與量測 21 4.1 全電路架構與性能的模擬 21 4.2 摺疊疊接式運算放大器主體 24 4.3 摺疊疊接式運算放大器佈局 26 4.4 寬振幅常數互導偏壓電路 28 4.5 電阻 29 4.6 摺疊疊接式放大器的特性模擬 33 第五章 離散元件的佈局模擬與量測 39 5.1 前言 39 5.2 互補式開關 39 5.3 無穩態多諧振盪器 40 5.4 緩衝器 46 5.5 MOS電阻的設計 48 5.6 S/H之時脈設計(Clock Design) 50 第六章 全電路佈局模擬與量測 55 6.1 全電路系統架構 55 6.2 單一運算放大器模擬與量測 56 6.3 改變輸入訊號頻率的離散元件量測結果 60 6.4 量測後系統效能降低原因之探討 64 6.5 改良放大器模擬 65 第七章 結論與未來展望 74 參考文獻 75 附錄A 連線電容 78 附錄B 元件模擬參數 84 | |
| dc.language.iso | zh-TW | |
| dc.subject | 電容感測器 | zh_TW |
| dc.subject | IC設計 | zh_TW |
| dc.subject | 折疊疊接放大器 | zh_TW |
| dc.subject | 類比積體電路 | zh_TW |
| dc.subject | 佈局 | zh_TW |
| dc.subject | capacitive sensor | en |
| dc.subject | IC design | en |
| dc.subject | folded cascode amplifier | en |
| dc.subject | analog integrated circuit | en |
| dc.subject | layout | en |
| dc.title | CMOS雙差動電容感測器研製 | zh_TW |
| dc.title | Study on the Fabrication of CMOS Double-differential Capacitive Sensors | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 98-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.coadvisor | 謝發華(Fa-Hwa Shieh) | |
| dc.contributor.oralexamcommittee | 張簡文添,陳柏志 | |
| dc.subject.keyword | 電容感測器,類比積體電路,折疊疊接放大器,IC設計,佈局, | zh_TW |
| dc.subject.keyword | capacitive sensor,analog integrated circuit,folded cascode amplifier,IC design,layout, | en |
| dc.relation.page | 91 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2010-08-10 | |
| dc.contributor.author-college | 工學院 | zh_TW |
| dc.contributor.author-dept | 應用力學研究所 | zh_TW |
| 顯示於系所單位: | 應用力學研究所 | |
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|---|---|---|---|
| ntu-99-1.pdf 未授權公開取用 | 4.29 MB | Adobe PDF |
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