60-GHz單端轉差動向量合成式相移器之研製

Abstract

本論文為使用90-nm 1P9M CMOS製程設計一個應用於60-GHz相位陣列接收機之向量合成式相移器。該向量合成式相移器結合了向量產生器、可調增益放大器及向量調變器達到360度相位合成，而且該相移器同時在接收機前端扮演單端輸入轉成差動輸出之轉換器角色。 該向量產生器採用四相位功率分配器實現，在寬頻範圍內具有低損耗及相同輸出阻抗的特性，用來產生向量內插時所需要的正交基底。為了合成出任意相位，需要有向量調變器根據所要合成出來之信號所在象限，選擇出正交向量的極性，並且需要有可調增益放大器來調整兩個正交向量的權重，以達到向量合成，該可調增益放大器是由一級用來達到寬頻輸入阻抗匹配的共閘級放大器及兩級用來調整增益的差動對所組成之三級放大器結構。 在此設計當中，利用主動元件及電感器來達到級與級之間的阻抗匹配，並且配合巧妙的佈局規劃，大幅減少晶片面積。所有電路都是以對稱方式佈局，使輸出信號有好的對稱性，根據作者所知，對於設計一個差動輸出的向量合成式相移器而言，這是第一個提出對電路佈局對稱性分析及實驗證明的研究。

In this thesis, a 60-GHz vector sum phase shifter for phased array receiver was designed and fabricated in 90-nm 1P9M CMOS technology. This vector sum phase shifter incorporates a vector generator with a variable gain amplifier (VGA) and a vector modulator to achieve full-360° phase synthesizing. And the vector sum phase shifter is also a single-ended-to-differential converter at the receiver front end. The vector generator generates the required orthogonal bases for vector interpolation, and is realized by a four-way quadrature power divider which has the advantages of low loss and identical output port impedance over wide operation bandwidth. To synthesize a signal with an arbitrary phase, two quadrature vectors are needed, and the polarities of quadrature-phased signals for vector interpolating are selected by the vector modulator according to the quadrant where the required signal locates. Furthermore, to control the weightings of the quadrature signals, a VGA is needed. The VGA is in a three-stage configuration which is composed of a common-gate amplifier as the input stage for wideband input impedance matching and two stage differential pairs for the orthogonal vector weighted control. In this design, using active devices and inductors for inter-stage impedance matching and ingenious floor plan substantially reduce the chip size. To achieve good signal balance, all circuits are arranged in symmetric layouts. To the author’s best knowledge, this is the first analysis of symmetry of the circuit layout and the first demonstration of signal balance of the differential outputs in the design of a differential-output vector sum phase shifter.