連續漸進式類比數位轉換器之節能分析與設計

Abstract

本論文完整分析了在連續漸進式類比數位轉換器在不同的電容陣列架構下，其所需消耗的切換能量。依據不同的耗能設計需求，提供三種主要的電容陣列架構給設計者，分別為傳統式、跨接式和C-2C式的架構。 提出的電容陣列架構，在10位元解析的規格下比對於跨接式和傳統式架構，分別省了25.39%以及95.7%的切換能量。使用此新穎的電容陣列設計出一個具有10位元解析度、每秒100萬次取樣速度且適用於生醫應用的單端連續漸進式類比數位轉換器。以TSMC 90奈米製程進行模擬，其結果顯示功率損耗僅為3.43微瓦、在達到Nyquist頻率的有效解析度為9.65位元，FOM低達平均每次步階轉換5.1f焦耳。

In this thesis, the complete analysis of switching energy in different types of capacitor array of SAR ADCs has been derived. The 3 main types of capacitor array, conventional, attenuation, and C-2C structures are recommended to designers who have different requirements of power budgets. The proposed capacitor array saves 25.39% of switching energy compared to the attenuation structure and 95.7% compared to the conventional structure in 10bit resolution cases. A 10bit, 1MS/s single-ended SAR ADC with the novel capacitor array is designed for bio-medical applications. Simulation results of the proposed ADC show the average power is 3.43 W and the ENOB reaches 9.65 bits within the Nyquist rate. The FOM is as low as 5.1fJ/conversion-step using the TSMC 90nm process.