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標題: | 應用於微波與毫米波之相移器的研製 Design of Phase Shifter for Microwave and Millimeter-wave Applications |
作者: | Pen-Jui Peng 彭朋瑞 |
指導教授: | 王暉 |
關鍵字: | 金氧半場效電晶體,相位陣列系統,相移器,可變增益放大器, CMOS,phase array system,phase shifter,variable gain amplifier, |
出版年 : | 2010 |
學位: | 碩士 |
摘要: | 在本論文中實作了三個互補金氧半導體(CMOS)的相移器(phase shifter),應用於直接升降頻(direct conversion)系統以及相位陣列(phase array)系統中。
第一個相移器是應用在60 GHz的直接升降頻系統中,由於直接升降頻通訊架構最大的問題是當I (in-phase) Q (quadrature phase)兩路訊號有誤差的時候,會導致傳輸時訊號品質下降,只要能夠降低IQ的誤差,就可以大幅提高訊號品質。因此,在這次的實作中,利用65 nm CMOS製程製作了一個30 GHz的連續可調式相移器。由於是應用在60 GHz的次諧波(sub-harmonic)混頻架構,所以本地振盪器(LO)只需用30 GHz,而在本地振盪器之後接上此相移器,將訊號分成IQ兩路分別到達IQ混頻器的輸入端。由於是次諧波的架構,相移器的輸出只需要相差45度就可以產生IQ兩路的訊號,而利用連續可調式相移器的好處,可以提供45±10度的相位差以及±2 dB的增益差,以改善IQ兩路的誤差。 第二與第三個相移器是應用在60 GHz的相位陣列系統中。由於相位陣列系統的空間多樣性與高陣列增益可以提高系統的頻譜使用效率,相位陣列系統已成為未來通訊系統的趨勢,而利用CMOS擁有高度整合的特點,可以將相位陣列系統應用於許多地方。 首先,第二個電路是一個切換式相移器,使用65 nm CMOS的製程實現。由於相移器在調整相位時損耗也會跟著改變,通常需要一個可調增益放大器(VGA),然而當可調增益放大器調整增益時,相位又會跟著改變,導致相移器無法同時達到較低的增益誤差及相位誤差。在本設計中,提出了一種新型的可調增益放大器,藉由相位補償的機制,可以改善可調增益放大器在調整增益時相位產生誤差的效應,以達到較低的增益誤差及相位誤差。該相移器在60-66 GHz頻段中展示了小於7.2度的方均根(RMS)相位誤差及小於0.2 dB的方均根增益誤差。而在該頻段的平均的增益為-7 dB。 第三個電路是一個利用向量疊加法實現的相移器,使用90 nm CMOS製程實現。利用向量疊加法實現的相移器可合成任何相位及大小,因此可降低在單一頻率下的相位誤差。然而,一般向量疊加式相移器遇到的問題主要是頻寬會有所受限,因為不容易實現寬頻90度相位差的耦合器。而在本次的設計中,提出了一種能夠產生寬頻相位差的功率分配器,藉由此功率分配器可以提高相移器的頻寬。該相移器在57-66 GHz頻段中展示了小於5度的方均根(RMS)相位誤差,小於0.5 dB的方均根增益誤差,並且平均有-5 dB的增益。 Three phase shifters in CMOS technology are implemented in this thesis. It can be used in a direct conversion system and phase array system. The first phase shifter is applied in a 60 GHz sub-harmonic mixing direct conversion system. The LO frequency is set to be 30 GHz due to the sub-harmonic architecture. The most important problem in a direct conversion system is the IQ mismatch since the signal quality will be degraded by IQ mismatch. Reducing the IQ mismatch can increase the signal quality substantially. Therefore, a 30 GHz continuously tunable phase shifter using 65 nm CMOS technology is presented in this thesis. This phase shifter is set after the LO, dividing the LO signal into IQ paths and the IQ signals will be inserted to the IQ mixer, respectively. The IQ signals can be generated by a 45° phase shifter due to the sub-harmonic architecture. Using the continuously tunable phase shifter, this phase shifter can provide 45° ± 10° phase difference, and ±2 dB amplitude imbalance. Therefore, the IQ signals will have good match by using the phase shifter. The second and the third phase shifters are applied in a 60 GHz phase array system. Phase array system has been widely used in nowadays communication system since the high spatial selectivity and the high array gain can improve the spectral efficiency. Since the CMOS technology have high integration, the phase array system can be applied in many respects. The second circuit is a switching type phase shifter using 65 nm CMOS technology. Since the losses in different phase state are not the same, it will cause the amplitude error. To minimize the amplitude error of the STPS, a variable gain amplifier (VGA) can be cascaded with the phase shifter to compensate the different loss in each state. However, when VGA provides different gain to compensate the different loss of each state, the insertion phase of the VGA will also be changed. Therefore, it is difficult to achieve low RMS phase error and low RMS gain error simultaneously. In this design, a STPS using a VGA with a new phase compensation technique is presented. The phase compensated VGA can provide variable gain without changing the insertion phase. Using the phase compensated VGA, the gain error of the STPS can be minimized without degrading the phase error. The measured RMS phase error and amplitude error are under 7.2° and 0.2 dB respectively in 60 to 66 GHz. The average amplitude is about -7 dB. The third circuit is a vector sum phase shifter using 90 nm CMOS technology. The vector sum phase shifter can synthesize any amplitude and phase at certain frequency, so the phase error and amplitude error can be minimized. However, the vector sum phase shifter usually suffered from its narrow bandwidth since the IQ signals cannot be precise in wide frequency range. The proposed vector sum phase shifter using a wideband quadrature Wilkinson power divider to achieve low phase error in wideband. The measured RMS phase error and amplitude error are under 5° and 0.5 dB respectively in 57 to 66 GHz. The average amplitude is about -5 dB. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/47227 |
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