請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/47227
完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 王暉 | |
dc.contributor.author | Pen-Jui Peng | en |
dc.contributor.author | 彭朋瑞 | zh_TW |
dc.date.accessioned | 2021-06-15T05:51:31Z | - |
dc.date.available | 2013-08-20 | |
dc.date.copyright | 2010-08-20 | |
dc.date.issued | 2010 | |
dc.date.submitted | 2010-08-17 | |
dc.identifier.citation | [1] Frank Ellinger, Heinz Jäckel, and Werner Bächtold, “Varactor-loaded transmission-line phase shifter at C-band using lumped elements,” IEEE Trans. Microw. Theory Tech., vol. 51, no 4, pp. 1135-1140, Apr. 2003.
[2] Hongjoon Kim, Alexander B. Kozyrev, Abdolreza Karbassi, and D. W. van der Weide, “Linear tunable phase shifter using a left-handed transmission line,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 5, pp. 366-368, May 2005. [3] Mohamed A. Y. Abdalla, Khoman Phang, and George V. Eleftheriades, “Printed and integrated CMOS positive/negative refractive-index phase shifters using tunable active inductors,” IEEE Trans. Microw. Theory Tech., vol. 55, no 8, pp. 1611-1623, Aug. 2007. [4] Matthew A. Morton, Jonathan P. Comeau, John D. Cressler, Mark Mitchell, and John Papapolymerou, “Sources of phase error and design considerations for silicon-based monolithic high-pass/low-pass microwave phase shifters,” IEEE Trans. Microw. Theory Tech., vol. 54, no 12, pp. 4032-4040, Dec. 2006. [5] Dong-Woo Kang, and Songcheol Hong, “A 4-bit CMOS phase shifter using distributed active switches,” IEEE Trans. Microw. Theory Tech., vol. 55, no 7, pp. 1476-1483, Jul. 2007. [6] Masatake Hangai, Morishige Hieda, Norihiro Yunoue, Yoshinobu Sasaki, and Moriyasu Miyazaki, “S- and C-band ultra-compact phase shifters based on all-pass networks,” IEEE Trans. Microw. Theory Tech., vol. 58, no 1, pp. 41-47, Jan. 2010. [7] Byung-Wook Min and Gabriel M. Rebeiz, “Ka-band BiCMOS 4-bit phase shifter with integrated LNA for phased array T/R modules,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2007, pp. 479-482. [8] Wei-Je Tseng, Chin-Shen Lin, Zuo-Min Tsai, and Huei Wang, “A miniature switching phase shifter in 0.18-μm CMOS,” in IEEE APMC Symp. Dig., Dec. 2009, pp. 2132-2135. [9] Pei-Si Wu, Hong-Yeh Chang, Ming-Da Tsai, Tian-Wei Huang, and Huei Wang, “New miniature 15-20-GHz continuous-phase/amplitude control MMICs using 0.18-μm CMOS technology,” IEEE Trans. Microw. Theory Tech., vol. 54, no 1, pp. 10-19, Jan. 2006. [10] Pei-Si Wu, Hong-Yeh Chang, Ming-Fong Lei, Bo-Jr Huang, Huei Wang, Cheng-Ming Yu, and John G. J. Chern, “A 40-74 GHz amplitude/phase control MMIC using 90-nm CMOS technology,” in European Microwave Integrated Circuits Conference., Oct. 2007, pp. 115-118. [11] Kwang-Jin Koh and Gabriel M. Rebeiz, “0.13-μm CMOS phase shifters for X-, Ku-, and K-band phased arrays,” IEEE J. Solid-State Circuits, vol. 42, no. 11, pp. 2535-2546, Nov. 2007. [12] Behzad Biglarbegian, Mohammad Reza Nezhad-Ahmadi, Mohammad Fakharzadeh, and Safieddin Safavi-Naeini, “Millimeter-wave reflective-type phase shifter in CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 9, pp. 560-562, Sep. 2009. [13] Frank Ellinger, Rolf Vogt, and Werner Bachtold, “Ultra compact reflective-type phase shifter MMIC phase-control range for at C-band with 360o smart antenna combining,” IEEE J. Solid-State Circuits, vol. 37, no. 4, pp. 481-486, Apr. 2002. [14] Hossein Zarei, Cameron T. Charles, and David J. Allstot, “Reflective-type phase shifters for multiple-antenna transceivers,” IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 54, no. 8, pp. 1647-1656, Aug. 2007. [15] Hossein Zarei, Allan Ecker, Jinho Park, and David J. Allstot, “A full-range all-pass variable phase shifter for multiple antenna receivers,” IEEE International Symposium on Circuits and Systems, May 2005, pp. 2100-2103. [16] Hitoshi Hayashi, and Masahiro Muraguchi, “An MMIC active phase shifter using a variable resonant circuit,” IEEE Trans. Microw. Theory Tech., vol. 47, no 10, pp. 2021-2026, Oct. 1999. [17] David M. Pozar, Microwave Engineering, third edition, John Wiley & Sons, Inc., New York, 2005. [18] Praveen Babu Vadivelu, Padmanava Sen, Saikat Sarkar, Debasis Dawn, Stephane Pinel, and Joy Laskar, “Integrated CMOS mm-wave phase shifters for single chip portable radar,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2009, pp. 565-568. [19] Ming-Da Tsai, Arun Natarajan, “60GHz passive and active RF-path phase shifters in silicon,” in IEEE RFIC Symp. Dig., Jun. 2009, pp. 233-226. [20] Emanuel Cohen, Claudio G. Jakobson, Shmuel Ravid, and Dan Ritter, “A bidirectional TX/RX four-element phased array at 60GHz with RF-IF conversion block in 90-nm CMOS Process,” IEEE Trans. Microw. Theory Tech., vol. 58, no 5, pp. 1438-1446, May. 2010. [21] Sang Young Kim and Gabriel M. Rebeiz, “A 4-bit passive phase shifter for automotive radar applications in 0.13 μm CMOS,” in IEEE CSIC Symp. Dig., Oct. 2009, pp. 1-4. [22] Yikun Yu, Peter Baltus, Arthur van Roermund, Anton de Graauw, Edwin van der Heijden, Manel Collados, Cicero Vaucher, “A 60GHz digitally controlled RF-beamforming receiver front-end in 65nm CMOS,” in IEEE RFIC Symp. Dig., Jun. 2009, pp. 211-214. [23] I. Sarkas, M. Khanpour, A. Tomkins, P. Chevalier, P. Garcia, and S. P. Voinigescu, “W-band 65-nm CMOS and SiGe BiCMOS transmitter and receiver with lumped I-Q phase shifters,” in IEEE RFIC Symp. Dig., Jun. 2009, pp. 441-444. [24] Shuya Kishimoto, Naoyuki Orihashi, Yasuhiro Hamada, Masaharu Ito, and Kenichi Maruhashi, “A 60-GHz band CMOS phased array transmitter utilizing compact baseband phase shifters,” in IEEE RFIC Symp. Dig., Jun. 2009, pp. 215-218. [25] Kwang-Jin Koh, Jason W. May, and Gabriel M. Rebeiz, “A millimeter-wave(40–45GHz) 16-elemenm SiGe phased-array transmitter in 0.18-μm BiCMOS technology,” IEEE J. Solid-State Circuits, vol. 44, no. 5, pp. 1498-1509, May 2009. [26] Tiku Yu and Gabriel M. Rebeiz, “A 4-channel 24-27 GHz CMOS differential phased-array receiver,” in IEEE RFIC Symp. Dig., Jun. 2009, pp. 455-458. [27] You Zheng and Carlos E. Saavedra, “Full 360o vector-sum phase-shifter for microwave system applications,” IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 57, no. 4, pp. 752-758, Apr. 2010. [28] Dong-Woo Kang, Kwang-Jin Koh, and Gabriel M. Rebeiz, “A-Ku band two-antenna four-simultaneous beams SiGe BiCMOS phased array receiver,” IEEE Trans. Microw. Theory Tech., vol. 58, no 4, pp. 771-780, Apr. 2010. [29] Jen-Chieh Wu, Ting-Yueh Chin, Sheng-Fuh Chang, and Chia-Chan Chang, “2.45-GHz CMOS reflection-type phase-shifter MMICs with minimal loss variation over quadrants of phase-shift range,” IEEE Trans. Microw. Theory Tech., vol. 56, no 10, pp. 2180-2189, Oct. 2008. [30] Sunghwan Kim and Lawrence E. Larson, “A 44-GHz SiGe BiCMOS phase-shifting sub-harmonic up-converter for phased-array transmitters,” IEEE Trans. Microw. Theory Tech., vol. 58, no 5, pp. 1089-1099, May 2010. [31] Byung-Wook Min and Gabriel M. Rebeiz, “Ka-band SiGe HBT low phase imbalance differential 3-bit variable gain LNA,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 4, pp. 272-274, Apr. 2008. [32] Frank Ellinger, Udo Jörges, UweMayer, and Ralf Eickhoff, “Analysis and compensation of phase variations versus gain in amplifiers verified by SiGe HBT cascode RFIC,” IEEE Trans. Microw. Theory Tech., vol. 57, no 8, pp. 1885-1894, Aug. 2010. [33] Arun Natarajan, Abbas Komijani, Xiang Guan, Aydin Babakhani, and Ali Hajimiri, “A 77-GHz phased-array transceiver with on-chip antennas in silicon: transmitter and local LO-path phase shifting,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2807-2819, Dec. 2006. [34] Tiku Yu and Gabriel M. Rebeiz, “A 24 GHz 6-bit CMOS phased-array receiver,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 6, pp. 422-424, Jun. 2008. [35] Kwang-Jin Koh and Gabriel M. Rebeiz, “An X- and Ku-band 8-element phased-array receiver in 0.18-μm SiGe BiCMOS Technology,” IEEE J. Solid-State Circuits, vol. 43, no. 6, pp. 1360-1371, Jun. 2008. [36] Chao-Shiun Wang, Juin-Wei Huang, Kun-Da Chu, and Chorng-Kuang Wang, “A 60-GHz phased array receiver front-end in 0.13-μm CMOS Technology,” IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 56, no. 10, pp. 2341-2352, Oct. 2009. [37] Dong-Woo Kang, Jeong-Geun Kim, Byung-Wook Min, and Gabriel M. Rebeiz, “Single and four-element Ka-band transmit/receive phased-array silicon RFICs with 5-bit amplitude and phase control,” IEEE Trans. Microw. Theory Tech., vol. 57, no 12, pp. 3534-3543, Dec. 2009. [38] Young-Hoon Chun, and Jia-Sheng Hong, “A novel tunable transmission line and its application to a phase shifter,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 11, pp. 784-786, Nov. 2005. [39] Mohamed A. Y. Abdalla, Khoman Phang, and George V. Eleftheriades, “A 0.13-μm CMOS phase shifter using tunable positive/negative refractive index transmission lines,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 12, pp. 705-707, Dec. 2006. [40] Mohamed A. Y. Abdalla, Khoman Phang, and George V. Eleftheriades, “Printed and integrated CMOS positive/negative refractive-index phase shifters using tunable active inductors,” IEEE Trans. Microw. Theory Tech., vol. 55, no 8, pp. 1611-1623, Aug. 2007. [41] Choul-Young Kim, Jaemo Yang, Dong-Wook Kim, and Songcheol Hong, “A K-band CMOS voltage controlled delay line based on an artificial left-handed transmission line,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 11, pp. 731-733, Nov. 2008. [42] Liang-Hung Lu, and Yu-Te Liao, “A 4-GHz phase shifter MMIC in 0.18-μm CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 10, pp. 694-696, Oct. 2005. [43] Farbod Behbahani, Yoji Kishigami, John Leete and Asad A. Abidi, “CMOS mixers and polyphase filters for large image rejection,” IEEE J. Solid-State Circuits, vol. 36, no. 6, pp. 873-887, Jun. 2001. [44] Chin-Shen Lin, Pei-Si Wu, Mei-Chao Yeh, Jia-Shiang Fu, Hong-Yeh Chang, Kun-You Lin, and Huei Wang, “Analysis of multiconductor coupled-line Marchand baluns for miniature MMIC design,” IEEE Trans. Microw. Theory Tech., vol. 55, no 6, pp. 1190-1199, Aug. 2007. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/47227 | - |
dc.description.abstract | 在本論文中實作了三個互補金氧半導體(CMOS)的相移器(phase shifter),應用於直接升降頻(direct conversion)系統以及相位陣列(phase array)系統中。
第一個相移器是應用在60 GHz的直接升降頻系統中,由於直接升降頻通訊架構最大的問題是當I (in-phase) Q (quadrature phase)兩路訊號有誤差的時候,會導致傳輸時訊號品質下降,只要能夠降低IQ的誤差,就可以大幅提高訊號品質。因此,在這次的實作中,利用65 nm CMOS製程製作了一個30 GHz的連續可調式相移器。由於是應用在60 GHz的次諧波(sub-harmonic)混頻架構,所以本地振盪器(LO)只需用30 GHz,而在本地振盪器之後接上此相移器,將訊號分成IQ兩路分別到達IQ混頻器的輸入端。由於是次諧波的架構,相移器的輸出只需要相差45度就可以產生IQ兩路的訊號,而利用連續可調式相移器的好處,可以提供45±10度的相位差以及±2 dB的增益差,以改善IQ兩路的誤差。 第二與第三個相移器是應用在60 GHz的相位陣列系統中。由於相位陣列系統的空間多樣性與高陣列增益可以提高系統的頻譜使用效率,相位陣列系統已成為未來通訊系統的趨勢,而利用CMOS擁有高度整合的特點,可以將相位陣列系統應用於許多地方。 首先,第二個電路是一個切換式相移器,使用65 nm CMOS的製程實現。由於相移器在調整相位時損耗也會跟著改變,通常需要一個可調增益放大器(VGA),然而當可調增益放大器調整增益時,相位又會跟著改變,導致相移器無法同時達到較低的增益誤差及相位誤差。在本設計中,提出了一種新型的可調增益放大器,藉由相位補償的機制,可以改善可調增益放大器在調整增益時相位產生誤差的效應,以達到較低的增益誤差及相位誤差。該相移器在60-66 GHz頻段中展示了小於7.2度的方均根(RMS)相位誤差及小於0.2 dB的方均根增益誤差。而在該頻段的平均的增益為-7 dB。 第三個電路是一個利用向量疊加法實現的相移器,使用90 nm CMOS製程實現。利用向量疊加法實現的相移器可合成任何相位及大小,因此可降低在單一頻率下的相位誤差。然而,一般向量疊加式相移器遇到的問題主要是頻寬會有所受限,因為不容易實現寬頻90度相位差的耦合器。而在本次的設計中,提出了一種能夠產生寬頻相位差的功率分配器,藉由此功率分配器可以提高相移器的頻寬。該相移器在57-66 GHz頻段中展示了小於5度的方均根(RMS)相位誤差,小於0.5 dB的方均根增益誤差,並且平均有-5 dB的增益。 | zh_TW |
dc.description.abstract | Three phase shifters in CMOS technology are implemented in this thesis. It can be used in a direct conversion system and phase array system.
The first phase shifter is applied in a 60 GHz sub-harmonic mixing direct conversion system. The LO frequency is set to be 30 GHz due to the sub-harmonic architecture. The most important problem in a direct conversion system is the IQ mismatch since the signal quality will be degraded by IQ mismatch. Reducing the IQ mismatch can increase the signal quality substantially. Therefore, a 30 GHz continuously tunable phase shifter using 65 nm CMOS technology is presented in this thesis. This phase shifter is set after the LO, dividing the LO signal into IQ paths and the IQ signals will be inserted to the IQ mixer, respectively. The IQ signals can be generated by a 45° phase shifter due to the sub-harmonic architecture. Using the continuously tunable phase shifter, this phase shifter can provide 45° ± 10° phase difference, and ±2 dB amplitude imbalance. Therefore, the IQ signals will have good match by using the phase shifter. The second and the third phase shifters are applied in a 60 GHz phase array system. Phase array system has been widely used in nowadays communication system since the high spatial selectivity and the high array gain can improve the spectral efficiency. Since the CMOS technology have high integration, the phase array system can be applied in many respects. The second circuit is a switching type phase shifter using 65 nm CMOS technology. Since the losses in different phase state are not the same, it will cause the amplitude error. To minimize the amplitude error of the STPS, a variable gain amplifier (VGA) can be cascaded with the phase shifter to compensate the different loss in each state. However, when VGA provides different gain to compensate the different loss of each state, the insertion phase of the VGA will also be changed. Therefore, it is difficult to achieve low RMS phase error and low RMS gain error simultaneously. In this design, a STPS using a VGA with a new phase compensation technique is presented. The phase compensated VGA can provide variable gain without changing the insertion phase. Using the phase compensated VGA, the gain error of the STPS can be minimized without degrading the phase error. The measured RMS phase error and amplitude error are under 7.2° and 0.2 dB respectively in 60 to 66 GHz. The average amplitude is about -7 dB. The third circuit is a vector sum phase shifter using 90 nm CMOS technology. The vector sum phase shifter can synthesize any amplitude and phase at certain frequency, so the phase error and amplitude error can be minimized. However, the vector sum phase shifter usually suffered from its narrow bandwidth since the IQ signals cannot be precise in wide frequency range. The proposed vector sum phase shifter using a wideband quadrature Wilkinson power divider to achieve low phase error in wideband. The measured RMS phase error and amplitude error are under 5° and 0.5 dB respectively in 57 to 66 GHz. The average amplitude is about -5 dB. | en |
dc.description.provenance | Made available in DSpace on 2021-06-15T05:51:31Z (GMT). No. of bitstreams: 1 ntu-99-R97942019-1.pdf: 3209597 bytes, checksum: f4a093d5dd528c95cafe179c93257e10 (MD5) Previous issue date: 2010 | en |
dc.description.tableofcontents | 口試委員會審定書 #
誌謝 i 中文摘要 ii ABSTRACT iv CONTENTS vi LIST OF FIGURES ix LIST OF TABLES xvii Chapter 1 Introduction 1 1.1 Background and Motivation 1 1.2 Literature Survey 2 1.3 Contributions 4 1.4 Organization of the Thesis 5 Chapter 2 Overview of Phase Shifter 7 2.1 Introduction 7 2.2 Performance Parameter of Phase Shifter 7 2.2.1 Absolute and Relative Phase Shift 7 2.2.2 RMS Phase and Amplitude Errors [12] 9 2.3 Classification of Phase Shifters 10 2.3.1 Fixed State Phase Shifter 10 2.3.2 Adjustable State Phase Shifter 13 Chapter 3 A 30 GHz Continuously Tunable Phase Shifter for LO Compensation 18 3.1 Introduction 18 3.2 Design Method 20 3.2.1 Design of Wilkinson power divider 21 3.2.2 Design of tunable phase shifter 24 3.2.3 Design of tunable attenuator 29 3.2.4 Design of the LO phase shifter 31 3.3 Measurement Results 40 3.4 Discussion and Summary 45 Chapter 4 A 60 GHz 4-bit Switching Type Phase Shifter 49 4.1 Introduction 49 4.2 Design Method 51 4.2.1 Topology of the STPS 52 4.2.2 Topology of the Phase Compensated VGA 66 4.3 Measurement Considerations and Measurement Results 81 4.3.1 Measurement Result of the Phase Compensated VGA 81 4.3.2 Measurement Result of the STPS 85 4.4 Discussion 95 4.5 Redesign 101 4.6 Summary 106 Chapter 5 A 60 GHz Vector Sum Phase Shifter 107 5.1 Introduction 107 5.2 Design Method 107 5.2.1 Operation Principle of Vector Sum Phase Shifter 107 5.2.2 Design of Quadrature Wilkinson Power Divider 108 5.2.3 Design of Vector Sum Method 116 5.2.4 Design of Two Stage Buffer Amplifier 120 5.2.5 Simulation Result of the Vector Sum Phase Shifter 121 5.3 Measurement Results 126 5.4 Discuss and Summary 131 Chapter 6 Conclusions 133 REFERENCE 135 | |
dc.language.iso | en | |
dc.title | 應用於微波與毫米波之相移器的研製 | zh_TW |
dc.title | Design of Phase Shifter for Microwave and Millimeter-wave Applications | en |
dc.type | Thesis | |
dc.date.schoolyear | 98-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 林坤佑,蔡作敏,黃天偉 | |
dc.subject.keyword | 金氧半場效電晶體,相位陣列系統,相移器,可變增益放大器, | zh_TW |
dc.subject.keyword | CMOS,phase array system,phase shifter,variable gain amplifier, | en |
dc.relation.page | 142 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2010-08-18 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
顯示於系所單位: | 電信工程學研究所 |
文件中的檔案:
檔案 | 大小 | 格式 | |
---|---|---|---|
ntu-99-1.pdf 目前未授權公開取用 | 3.13 MB | Adobe PDF |
系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。