利用原子層沉積技術成長氮化鈦金屬閘極之金屬氧化物半導體電容元件之研究

Abstract

隨著半導體工業的發展，電晶體尺寸逐漸縮小，傳統的多晶矽閘極漸漸被金屬閘極給取代；由於氮化鈦(Titanium Nitride, TiN)具有高硬度、熱穩定性佳、低電阻率等優點，因此氮化鈦成為很好的金屬閘極材料。電晶體的尺寸縮小，對尺寸的精密度的要求愈高，由於原子層沉積技術(Atomic Layer Deposition , ALD)具又大面積均勻性、精密的控制厚度、高包覆度及低缺陷密度等優勢，因此成為十分有發展潛力的技術。本論文利用ALD技術製備氮化鈦(Titanium Nitride, TiN)薄膜，使用四（二甲胺基）鈦（tetrakis(dimethylamido)titanium, TDMAT）與氨氣電漿(NH3 plasma)作為precursor，其成長速率約為0.134nm/cycle，電阻率可以到5.77×10-5Ω-cm，為目前文獻中最低的電阻率。此外，本研究也透過金氧半電容元件量測氮化鈦的功函數，在不同的厚度及氣體電漿處理下，氮化鈦的功函數可以調整在4.1eV~4.7eV的範圍內，預期在電晶體上有很重要的應用。

As the semiconductor devices continues shrinking, not only the standard silicon dioxide gate dielectric has to be replaced with a high-K material, but also the commonly used poly-Si gate electrode has to be substituted by a low-resistive metallic material. Since titanium nitride (TiN) is a hard, thermally stabile, and low-resistivity metallic material, it is a good candidate for the new gate electrode. In addition, because the devices scale is scaled down to ~10 nm range, atomic layer deposition (ALD) technique is strongly needed to prepare the ultrathin films because of its high uniform in a large area, excellent conformality, low defect density, and accurate control of film thickness. In this thesis, the ALD technique was used to prepare the TiN metal gate, with a growth rate of 0.134nm per ALD cycle using TDMAT(tetrakis(dimethylamido)titanium) and remote NH3 plasma as the precursors. A low resistivity 5.77×10-5Ω-cm of the TiN thin flims was acheived. The work function of the TiN metal gate was also characterized in this study. The work function of the TiN metal gate varies between 4.1eV and 4.7eV, depending on the film thickness and the plasma treatment, which is beneficial to the adjustment of threshold voltage of transistors.