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Title: | 快閃記憶體儲存裝置之有效率錯誤偵測方法 An Efficient Fault Detection Algorithm for NAND Flash Memory |
Authors: | Chia-Ling Ko 柯佳伶 |
Advisor: | 郭大維 |
Keyword: | 快閃記憶體,單階儲存單元,多階儲存單元,錯誤測試演算法,抽樣測試, fl,ash memory,reliability,SLC,MLC,fault detection algorithm, |
Publication Year : | 2009 |
Degree: | 碩士 |
Abstract: | 快閃記憶體因為不需電力來維持數據的儲存,又相較於傳統硬碟有體積小、重量輕、讀寫速度快以及抗震的特性,近年來在市場上廣泛的被利用於嵌入式系統的儲存裝置。快閃記憶體上技術的發展可使其提供更大的容量,但也降低了快閃記憶體的可靠性,錯誤測試方式也因此益發重要。本論文針對單階儲存單元快閃記憶體 (Single Level Cell, SLC)及多階儲存單元快閃記憶體(Multiple Level Cell, MLC)分別提出了相對應的測試方法。除了提出完整的測試方式外,本論文提出使用抽樣測試及測試平行化的策略,在偵測能力小幅的降低下,使測試的時
間可以大幅的減少。 As flash memory gains its momentum in the storage market of embedded systems, existing fault detection algorithms face serious challenges due to the special characteristics of NAND flash memory and the rapid degradation of its reliability. This research proposes efficient fault detection algorithms to detect the faults of NAND flash memory in a systematic way. A sampling policy with a write parallelization strategy is also proposed to further enhance the efficiency of the fault detection algorithms. The sampling policy is later evaluated based on selected fault distribution models to show its effectiveness and efficiency on the fault detection of NAND flash memory. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/44328 |
Fulltext Rights: | 有償授權 |
Appears in Collections: | 資訊工程學系 |
Files in This Item:
File | Size | Format | |
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ntu-98-1.pdf Restricted Access | 1.44 MB | Adobe PDF |
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