即時視訊處理架構之軟硬體共同設計

Abstract

在本論文中提出了一個模組化、可重複使用、功能強大的即時視訊處理平台。此平台以Altera的Cyclone II FPGA與Terasic的DE2-70開發版為基礎，配備了500萬像素CMOS數位攝影機與800 x 400 LCD觸控式螢幕模組。整個系統由μC/OS-II與Nios II構成，使用多主從與共享記體方式，搭配Pipeline Bridge與SDRAM雙通道完成整個架構，支援軟硬體共同設計，經過模擬與合成結果，證明了此架構能達到即時視訊處理的嚴格要求。

In this paper, a modular, configurable and versatile platform for real-time video processing is presented. The hardware platform is based on the Altera Cyclone II FPGA and Terasic DE2-70 development board which is equipped with 500M pixel CMOS digital camera and 800x480 resolution LCD touch panel module. The platform supports simultaneous HW/SW co-design and partitioning. The whole of system was made under µC/OS-II and was performed on the Nios II soft core processor, constructed by Multi-Master , Shared Memory, Pipeline Bridge, and Dual-Channel SDRAM architecture. Simulation and Synthesis results are presented and prove that our video system respect the real-time constraint.