請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/38490
標題: | 應用硝酸氧化及陽極氧化補償技術製作金氧半元件之奈米尺度高介電係數氧化鉿閘極介電層 Application of Chemical Oxidation in Nitric Acid and Anodic Oxidation Compensation Techniques on Preparing Nano-Scale High-k HfO2 Gate Dielectrics in MOS Devices |
作者: | Chia-Hua Chang 張嘉華 |
指導教授: | 胡振國(Jenn-Gwo Hwu) |
關鍵字: | 高介電係數閘極介電層,氧化鉿,金氧半電容元件,陽極氧化補償技術, High-k gate dielectrics,HfO2,MOS capacitors,Anodic oxidation compensation techniques, |
出版年 : | 2005 |
學位: | 碩士 |
摘要: | 在本論文研究中,我們提供一種低成本及室溫下成長之方法製備高介電常數氧化鉿閘極介電層。替代性的高介電常數閘極氧化層由於具有較大的物理厚度,可以在相同的等效氧化層厚度下有效的降低漏電流,因此各種金屬氧化物已經被廣泛的研究。氧化鉿由於具有比氮化矽及氧化鋁更高的介電常數及較高的生成熱,因此被認為是未來互補式金氧半電晶體技術中最有潛力的閘極氧化層。而本研究中利用硝酸氧化濺鍍沉積之金屬鉿薄膜,接著以快速熱退火技術製備出具有極佳均勻度及良好電特性之氧化鉿閘極介電層,其最小等效氧化層厚度可達1.5 nm,相同等效氧化層厚度情況下,此高介電常數閘極氧化層之漏電流比二氧化矽的漏電流降低了約1000倍。藉由研究漏電流與介面性質及施加應力後的穩定度可了解硝酸氧化之最佳製程參數,其中包含硝酸濃度、氧化時間以及氧化後退火與金屬後退火的效應。此外,我們也探討了硝酸氧化後再利用陽極氧化補償來改善電特性的方法,雖然硝酸氧化法所製備的元件已具有良好的電特性,但經由氧化後再利用純水室溫陽極氧化補償技術,使得氧化層缺陷被進一步修補,所以可得到更小的漏電流、較高的崩潰電場、較輕微之頻率發散特性、以及使元件有更佳的穩定度。本研究所提出之以低成本及低熱預算成長的高介電常數閘極介電層製備技術,十分具有參考價值。 In this work, a method of cost-effective and room temperature process for preparing high-k hafnium oxide gate dielectrics is proposed. The alternative high dielectric constant gate dielectrics had been widely investigated because of their thicker physical thickness that can reduce the leakage currents under the same equivalent oxide thickness (EOT). HfO2 is a potential gate insulator for future CMOS applications due to its high dielectric constant as compared to Si3N4 and Al2O3 as well as their high free reaction energy with silicon. In our research, HfO2 was prepared by chemical oxidizing of thin hafnium films in nitric acid and then followed by rapid thermal anneal (RTA). They exhibited good performance in uniformity and electrical characteristics. The optimal parameters of HNO3 oxidation including acid concentration, dipped time, the effects of post-oxidation anneal (POA), and post-metallization anneal (PMA) are studied by the leakage current, interfacial properties, and stress reliability. The technique of oxidation followed by anodization compensation was also investigated. Though the gate dielectrics prepared by the aforementioned method shows excellent properties, the electrical characteristics of smaller leakage current, higher breakdown field, and excellent reliability were observed by introducing the room temperature anodization compensation technique. The proposed method is of value for high-k gate dielectric engineering. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/38490 |
全文授權: | 有償授權 |
顯示於系所單位: | 電子工程學研究所 |
文件中的檔案:
檔案 | 大小 | 格式 | |
---|---|---|---|
ntu-94-1.pdf 目前未授權公開取用 | 863.81 kB | Adobe PDF |
系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。