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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 張培仁 | |
dc.contributor.author | Chang-Wen Wang | en |
dc.contributor.author | 王昶文 | zh_TW |
dc.date.accessioned | 2021-06-13T15:25:42Z | - |
dc.date.available | 2008-07-30 | |
dc.date.copyright | 2008-07-30 | |
dc.date.issued | 2008 | |
dc.date.submitted | 2008-07-18 | |
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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/37366 | - |
dc.description.abstract | 本研究目標在提出一能夠準確計算平行板電容的經驗公式,包含二維與三維邊緣電容效應。公式的推導從大量不同幾何尺寸的數值模擬開始,接著取適當的參數對模擬值作曲線回歸,便可以得到二維與三維邊緣電容公式,其準確度與模擬值相比,誤差分別在百分之二與百分之四以內。之後我們利用所提出的二維與三維邊緣電容公式,進行微元件吸附電壓的推導,與文獻之實驗值相比,有相當良好的準確度,證明本研究所提出的公式的確可以應用於微機電元件的設計。最後為了實際驗證本研究所提出之公式,我們使用微機電製程進行了二維與三維邊緣電容的實驗,而二維與三維邊緣電容公式與實驗值相比,誤差分別在百分之三以及百分之五以內。這個高準確度的公式,相較於其他文獻所提出的方式更為便利,且無論在準確度、公式的適用範圍、物理意義等方面,都具有優勢,因此元件設計者可以利用本研究所提出之公式作為參考,只需經由幾何尺寸,無須透過數值模擬或實驗,便可以快速及準確的計算出電容值。 | zh_TW |
dc.description.abstract | This research aims at developing empirical formulas for parallel-plate capacitor precisely, including two- and three-dimensional fringing capacitance effects. The derivation was started from massive numerical simulations of different geometry, and then we can derive two- and three- dimensional fringing capacitance formulas from choosing appropriate parameters to curve-fitting on results obtained from simulations. The relative errors of two- and three-dimensional fringing capacitance formulas are within 2 and 4 percent comparing with numerical simulations, respectively. Next, we derived the pull-in voltage of micro-devices from these formulas and it shows very high accuracy comparing with experimental data obtained from literature. It demonstrates that the formulas we proposed can apply to the design of microelectromechanical devices. Finally, in order to verify these formulas we proposed actually, we conducted experiment of two- and three-dimensional fringing capacitance by the semiconductor processing. The relative errors of two- and three-dimensional fringing capacitance formulas are within 3 and 5 percent comparing with experimental data, respectively. These high precision empirical formulas are more convenient than other proposed methods, and the accuracy, the applicative range, and the physical meaning are better, too. Therefore, by these high precision formulas, designers can easily evaluate the capacitance through the geometry in a few seconds. | en |
dc.description.provenance | Made available in DSpace on 2021-06-13T15:25:42Z (GMT). No. of bitstreams: 1 ntu-97-R95543004-1.pdf: 3497645 bytes, checksum: cb7723d2fdbfbb7626b591f0c9262735 (MD5) Previous issue date: 2008 | en |
dc.description.tableofcontents | 謝誌 i
中文摘要 iii Abstract (英文摘要) iv 目錄 v 圖目錄 viii 表目錄 xiii 符號說明 xv 第一章 導論 1 1.1 研究動機 1 1.2 文獻回顧與探討 2 1.2.1 二維無厚度平行板電容文獻回顧 2 1.2.2 二維真實厚度平行板電容文獻回顧 3 1.2.3 三維平行板電容文獻回顧 7 1.3 論文架構 9 第二章 微結構之邊緣電容模型 10 2.1 理想電容公式 11 2.2 邊緣電容探討 13 2.3 二維邊緣電容公式 19 2.4 三維邊緣電容公式 23 2.5 綜合比較 26 2.5.1 二維邊緣電容公式綜合比較 26 2.5.1 三維邊緣電容公式綜合比較 29 第三章 受靜電力驅動之微結構的吸附電壓解析模型 33 3.1 分析模型 34 3.2 微結構系統總能量式 36 3.2.1 兩端固定樑系統總能量式 36 3.2.2 橋狀樑系統總能量式 37 3.2.3 懸臂樑系統總能量式 38 3.2.4 步階型式懸臂樑系統總能量式 39 3.3 吸附電壓近似解析解 41 3.3.1 兩端固定樑吸附電壓近似解析解 42 3.3.2 橋狀樑吸附電壓近似解析解 42 3.3.3 懸臂樑吸附電壓近似解析解 43 3.3.4 步階型式懸臂樑吸附電壓近似解析解 44 3.4 四階吸附電壓近似解析解 46 3.4.1 兩端固定樑四階吸附電壓近似解析解 47 3.4.2 橋狀樑四階吸附電壓近似解析解 48 3.4.3 懸臂樑四階吸附電壓近似解析解 49 3.4.4 步階型式懸臂樑四階吸附電壓近似解析解 50 3.5 假設模態法 51 3.5.1 兩端固定樑撓曲函數 52 3.5.2 橋狀樑撓曲函數 52 3.5.3 懸臂樑撓曲函數 53 3.5.4 步階型式懸臂樑撓曲函數 54 3.6 理論驗證 56 3.6.1 兩端固定樑理論驗證 57 3.6.2 橋狀樑理論驗證 60 3.6.3 懸臂樑理論驗證 63 3.6.4 步階型式懸臂樑理論驗證 64 第四章 實驗驗證 67 4.1 實驗原理 68 4.2 製程介紹 71 4.2.1 大尺度模型實驗 71 4.2.2 微結構模型實驗 73 4.3 實驗量測 79 4.4 實驗結果與討論 84 4.4.1 二維邊緣電容實驗結果與討論 84 4.4.1 三維邊緣電容實驗結果與討論 86 第五章 結論與未來展望 90 5.1 結果與討論 90 5.2 未來展望 91 參考文獻 92 | |
dc.language.iso | zh-TW | |
dc.title | 內連線邊緣電容模型及其在探討微元件之吸附電壓之應用 | zh_TW |
dc.title | The Interconnect Fringing Capacitance Model and Its Applications to the Study of Pull-in Voltage of Micro Devices | en |
dc.type | Thesis | |
dc.date.schoolyear | 96-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 胡毓忠,施文彬,李其源 | |
dc.subject.keyword | 電容,平行板電容,邊緣電容,微元件,吸附電壓,微機電, | zh_TW |
dc.subject.keyword | Capacitance,Parallel-plate Capacitor,Fringing Capacitance,Micro-device,Pull-in Voltage,Microelectromechanical,MEMS, | en |
dc.relation.page | 94 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2008-07-18 | |
dc.contributor.author-college | 工學院 | zh_TW |
dc.contributor.author-dept | 應用力學研究所 | zh_TW |
顯示於系所單位: | 應用力學研究所 |
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