可調電壓輸出驅動級電路設計

Abstract

本文主要為探討的功率電晶體驅動方式，提出可調整輸出電壓 的想法，並利用此想法加以設計改良驅動功率電晶體的方式已達到省電驅動的效果。主要設計可分為兩種不同架構，一種利用位準平移器為基本架構並加以變化，另一種利用線性穩壓器為概念，兩種方式皆可以達到省電，且可作為保護裝置的效果。由位準平移式架構需較大面積以及需要另外設計參考電壓等非理想特性，因此最後選擇線性穩壓式架構來進行晶片製作，最後量測實體電路結果與模擬結果一致。

This thesis is mainly about how to efficiently drive a power MOS in a switching converter. In order to save energy, an output driver circuit by the idea of regulable output voltage is presented. There are two different methods to do this. One is using the basic idea of level-shifter and modifying the basic structure. The other one is using the idea of linear regulator to regulate output voltage of an output driver. Both of the methods can satisfy the requirement of saving energy. However, the modified level-shifter costs larger area and additional reference circuit. As a result, a modified linear regulator was applied. Finally, the real IC test outcomes are verified.