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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電子工程學研究所
Please use this identifier to cite or link to this item: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/21146
Title: CMOS製程下應用於5G通訊Ka頻段切換式功率偵測器
Ka-band Switchable Power Detectors in CMOS Process
for 5G Communication
Authors: Chia-Jen Lin
林家任
Advisor: 盧信嘉(Hsin-Chia Lu)
Keyword: 毫米波,功率偵測電路,自動增益調變放大器,共閘極整流器,可切換功率偵測系統,5G通訊,
millimeter wave,power detector,automatic gain control amplifier,common gate rectifier,switch control power detector,5G communication,
Publication Year : 2019
Degree: 碩士
Abstract: 本論文主要研究毫米波頻段相關功率量測電路,操作頻率在28 GHz,為第五代通訊系統所適用之Ka頻段。首先將介紹傳統功率量測電路架構以及毫米波頻段功率量測系統相關文獻,接著介紹其中電路之架構、原理及應用目的,最後介紹本論文所提出兩種訊號偵測系統。
本論文提出之第一個電路為透過開關切換兩路平行式的 Ka頻段功率量測系統,使用台積電90nm CMOS製程,晶片面積為0.9mm x 0.49 mm,系統將輸入射頻訊號轉為輸出直流電壓。利用兩路平行架構,第一路搭載可變增益放大器串接共閘極功率偵測器,可量測到較小功率。第二路搭載單一共閘極功率偵測器,可量測到較大功率,並藉由開關控制訊號路徑,提升功率量測範圍及靈敏度,並偵測更小功率訊號。本偵測系統於28GHz下及線性誤差為1dB以下時,可量測-33.6 dBm至7.4 dBm訊號,頻寬為2GHz,靈敏度最高為46.8 mV/dB,靜態直流功耗為34 mW。
本論文提出之第二個電路為應用自動增益控制放大器之Ka頻段功率量測系統,使用台積電180nm CMOS製程,晶片面積為1.05mm x 0.685 mm,系統將輸入射頻功率轉為輸出直流電壓,利用單一共閘極整流器串接三態可變增益放大器,並藉由兩組比較器根據輸入訊號控制可變增益放大器之增益,實現自動切換輸入輸出轉移曲線,提高實用性、偵測範圍及靈敏度,並偵測更小輸入訊號。本偵測系統於28GHz下及線性誤差為1dB以下時,可偵測-47.2 dBm至-5.7 dBm訊號,頻寬為2 GHz,靈敏度最高為41.4 mV/dB,靜態直流功耗為35 mW。
本論文採用Keysight Advanced Design System (ADS)軟體進行電路模擬,被動走線及其他元件之電磁響應模擬則使用Sonnet軟體。晶片量測與模擬結果大致吻合,模擬修正及結果討論將分別於第四章及第五章探討。
This thesis presents two power detectors in Ka-band for 5G communication and they are proposed to measure power in real-time for the wireless communication system.
The first chip in this thesis uses a parallel structure which converts input RF power to output dc voltage. This chip is fabricated in TSMC 90-nm CMOS process and the chip size is 0.9 mm x 0.49 mm. The proposed power detection system uses a switch to switch between two paths. One path has amplifier with common gate power detector for power detection of small input power, while the other path has only one common gate power detector for large input power detection. With switch control, we can realize wide dynamic range, low detected power, and excellent sensitivity. The measured dynamic range is from -33.6 dBm to 7.4 dBm at 28GHz, with 2GHz bandwidth under 1dB log-error. The dc power consumption is 34 mW with supplied voltage at 1.2V.
The second chip has a automatic gain switch amplifier which also converts input RF power to output dc voltage. This chip is fabricated in TSMC 180-nm CMOS process and the chip size is 1.05 mm x 0.685 mm. The proposed power detect system consists of four variable gain amplifiers and common gate power detector in series. Variable gain amplifier is controlled by comparator based on output dc voltage. With variable gain amplifiers, we can achieve wide dynamic range, low detected power, and excellent sensitivity. The measured dynamic range is from -47.2 dBm to -5.7 dBm at 28GHz, with 2 GHz bandwidth under 1dB log-error. The dc power consumption is 35 mW with supplied voltage 1.8V.
The chips proposed in this thesis were designed by using Keysight ADS and Sonnet for the circuit and EM simulation. The measurement results fit well with the simulation.
URI: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/21146
DOI: 10.6342/NTU201904350
Fulltext Rights: 未授權
Appears in Collections:電子工程學研究所

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