具背景時間偏移較正十二位元六億取樣頻率多通道類比數位轉換器

Abstract

本論文提出一個四通道十二位元連續漸進暫存類比數位轉換器，使用了提出的數位較正方式來補償時間偏移誤差，轉換器達到六億赫茲取樣頻率。多通道類比數位轉換器共使用了四個通道。數位混波使用來估計時間偏移量，再使用本論文所提出的延遲取樣雙核心方法來做時間偏移的校正。晶片用四十奈米CMOS製成製作，改善多通道寄生頻率音調從-50分貝到-76分貝，並且達到61.7分貝的訊號對雜訊與諧波比，功耗23毫瓦從一個0.9伏的供應電壓。品質因數(FoM)是38.7fJ/conversion-step，核心電路佔據0.3毫米平方面積。

A four channel time-interleaved 12-b SAR ADC, employing the proposed digital calibration technique to correct timing skew, achieves a 600-MHz sampling rate. The interleaved ADC composed of four channel SAR ADC. Digital mixing method is used to estimate timing skew, and proposed dual core with delay sampling is used to correct the timing skew. The ADC has been fabricated in a 40-nm CMOS technology, improves interleaving spurious tones from -50dB to -76dB and achieves a 61.7-dB SNDR while dissipating 23 mW from a 0.9-V power supply. The figure of merit (FoM) is 38.7 fJ/conversion-step and the active area is 0.3 mm2