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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/17375| 標題: | 應用於醫用超音波影像前端發射電路之研製 Development of CMOS Transmitter Front-ends for Ultrasound Imaging Applications |
| 作者: | Kuan-Yu Shih 施冠宇 |
| 指導教授: | 呂良鴻(Liang-Hung Lu) |
| 關鍵字: | 超音波,脈衝發射器,切換開關,數位類比轉換器,高速,高電壓, Ultrasound,Pulser,Switch,Digital-to-analog Converter,High Speed,High Voltage, |
| 出版年 : | 2013 |
| 學位: | 碩士 |
| 摘要: | 由於安全性及低成本的考量,超音波影像一直是醫師在臨床診斷中的一大利器。近年來隨著高速電路的技術愈趨成熟,高頻超音波的系統也漸漸的被實作出來。為了提高系統整合度、降低成本及減少寄生效應,必須發展CMOS超音波前端發射電路。在此論文中,使用了0.25-μm高電壓互補式金氧半導體製程實現兩個超音波前端發射電路。第一章對超音波成像系統進行基本的介紹,第二章則對超音波前端發射電路的設計流程及背景知識進行說明。
第三章提出了一個以0.25-μm高電壓互補式金氧半導體製程實現超音波前端發射電路,包含了脈衝發射器和發/收切換開關。為了達到高速的需求,脈衝發射器直接從電源供應器對探頭進行充放電以產生高頻超音波,發/收切換開關則使用以電晶體為主的開關並針對高線性度及低功耗進行設計。 第四章實作了一個高速高電壓數位類比轉換器可提供任意波型激發探頭,架構上使用了電流模式的數位類比轉換器以達到高速的需求,並使用單位元切換方式及共質心對稱式佈局降低靜態與切換的誤差。最後,在第五章會進行本論文的總結。 In diagnostic medicine, ultrasound imaging is one of the most widely used diagnostic tools due to its safety and relatively low cost. Recently, as the progress of high-speed electronic circuits, high frequency ultrasound imaging has become realizable. To facilitate system-on-chip implementation to minimize the cost and the parasitic effects, the development of CMOS ultrasound transmitter front-end is essential. By using 0.25-μm high-voltage CMOS process, two circuits are implemented in this thesis. The first chapter introduces the fundamentals of an ultrasound imaging system, including a brief introduction to the whole system and the architecture of the transmitter/receiver. Chapter 2 illustrates the basics and challenges in ultrasound transmitter design and the link budget calculation is demonstrated for system optimization. In Chapter 3, an interface circuit, including a high-speed pulser and a highly linear low-power T/R switch, is implemented by using a 0.25-μm high-voltage CMOS process. With the direct-drive technique, the transducer can be charged/discharged fast to produce high frequency acoustic wave. In order to improve the linearity, a bootstrapped, MOS-based switch is proposed, which consumes only dynamic power. In Chapter 4, a 6-bit, 150 MS/s high-voltage digital-to-analog converter with an output swing of 31.5 VPP is implemented in 0.25-μm high-voltage CMOS technology. For high-speed operation and area reduction, a current-steering DAC is proposed by using only one high-voltage device per unit cell. Unary switching scheme and common centroid layout are utilized to minimize the static and switching errors. Finally, a conclusion of this thesis is made in Chapter 5. |
| URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/17375 |
| 全文授權: | 未授權 |
| 顯示於系所單位: | 電子工程學研究所 |
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