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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/16106完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 黃天偉 | |
| dc.contributor.author | Chia-Wei Chang | en |
| dc.contributor.author | 張家瑋 | zh_TW |
| dc.date.accessioned | 2021-06-07T18:01:14Z | - |
| dc.date.copyright | 2012-08-15 | |
| dc.date.issued | 2012 | |
| dc.date.submitted | 2012-08-06 | |
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Rutledge, and Ali Hajimiri, Member, IEEE,” Fully Integrated CMOS Power Amplifier Design Using the Distributed Active-Transformer Architecture”, IEEE Journal of Solid-State Circuits, VOL. 37, NO. 3, March 2002. [35] P. Haldi, G. Liu and A.M. Niknejad, “CMOS compatible transformer power combiner”, Electronics Letters, Vol. 42, No. 19, 14th September 2006. [36] W. H. Chen, “Symmetric 3D Passive Components and VCO Design in CMOS Process”, Master Thesis, National Central University, July 2003. [37] Ali Hajimiri, and Thomas H. Lee, “A General Theory of Phase Noise in Electrical Oscillators”, IEEE Journal of Solid-State Circuits, VOL. 33, NO. 2, February 1998. [38] C. Patrick Yue, and S. Simon Wong,” Physical Modeling of Spiral Inductors on Silicon”, IEEE Transactions on Electron Devices, VOL. 47, NO. 3, March 2000. [39] C. A. Lin, “Design of Microwave and Millimeter-Wave CMOS VCOs and Frequency Dividers”, Master Thesis, National Taiwan University. June 2009. [40] Pietro Andreani, Xiaoyan Wang, Luca Vandi, and Ali Fard, “A Study of Phase Noise in Colpitts and LC-Tank CMOS Oscillators”, IEEE Journal of Solid-State Circuits, VOL. 40, NO. 5, May 2005. [41] Design Manual of 1P6M 0.18-um CMOS, TSMC. [42] Design Manual of tMt GIPD process, CIC. [43] Ching-Hung Chiu, Kung-Hao Liang, Hong-Yeh Chang, and Yi-Jen Chan, “A Low Phase Noise 26-GHz Push-Push VCO with A WideTuning Range in 0.18-um CMOS Technology”, Asia Pacific Microwave Conference, 2006. [44] KaChun Kwok,,and John R. Long, “ A 23-to-29 GHz Transconductor-Tuned VCO MMIC in 0.13 um CMOS”, IEEE Journal of Solid-State Circuits, 2007. [45] D.Y. Jung and C.S. Park, “Power efficient Ka-band low phase noise VCO in 0.13 um CMOS”, Electronic Letters, 2008. [46] J. P. Carr and B. M. Frank,” A 38 GHz Accumulation MOS Differentially Tuned VCO Design in 0.18-μm CMOS”, Silicon Monolithic Integrated Circuits in RF Systems, 2006. [47] H. L. Kao, S. P. Shih, C. S. Yeh, C. M. Yang, C. Y. Ke, Y. C. Lee, Jeffrey S. Fu and L. C. Chang, “A Ka-band Triple Push Coupled Pair VCO using 0.18-μm CMOS Technology”, Wireless and Optical Communications Networks (WOCN), 2011. [48] Jing-Lin Kuo, Zuo-Ming Tsai, Huei Wang, “A 19.1-dBm Fully-Integrated 24-GHz Power Amplifier Using 0.18-um CMOS Technology”, in Proceedings of the 1st European Wireless Technology Conference, 2008. [49] Henrique Portela, Viswanathan Subramanian, and Georg Boeck,” Fully integrated high efficiency K-band PA in 0.18 um CMOS Technology”, SBMO/IEEE MTT-S International Microwave & Optoelectronics Conference, 2009. [50] Yung-Nien Jen, Jeng-Han Tsai,Chung-Te Peng, and Tian-Wei Huang,” A 20 to 24 GHz 16.8 dBm Fully Integrated Power Amplifier Using 0.18 um CMOS Process”, IEEE Microwave and Wireless Components Letters, VOL. 19, NO. 1, January 2009. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/16106 | - |
| dc.description.abstract | 放大器與電壓控制震盪器在現代的無線通訊中扮演著不可或缺的角色，本論文的重心在於此兩種電路的設計與分析。由於製程科技的演進，互補式金氧半導體(CMOS)可操作的頻率也逐漸升高，再加上其低成本與系統整合的優勢，讓原本以三五族半導體製程為主的微波毫米波電路也開始使用CMOS製程來設計與製造。本論文總共研究了三個電路，分別是使用了65奈米CMOS製程設計並實現的緩衝放大器以及90奈米CMOS製程的變壓器結合之功率放大器，最後是使用0.18微米CMOS和玻璃被動元件整合製程(GIPD)的電壓控制震盪器。
在此篇論文中，我們討論了放大器的一些基本概念，再提出了一個使用65奈米CMOS製程設計的73到84 GHz 緩衝放大器。我們使用了三級的共源極放大器而且使用被動元件來實現匹配網路。最後，整體的晶片面積分別是0.18 mm2 (包含pad)/0.127 mm2 (不含pad)。這顆放大器操作在1 V的偏壓，整體的電流大小為15 mA。這顆緩衝放大器在73到84 GHz之間提供了18.6±1dB的增益且於77 GHz下提供了18.6dB的增益且OP1dB為 -1 dBm。 接著，我們提出一個24 GHz的變壓器結合功率放大器。在提出如何設計這個放大器之前，我們先討論了功率放大器的偏壓選擇和不同的功率結合的方法。最後我們選擇了4路結合的變壓器當作輸出端的功率結合器。這個放大器使用了兩級的cascode架構。整體的晶片面積為0.92 mm2。此放大器在24 GHz下提供了14.1 dB的增益且OP1dB為21 dBm，而最大的輸出功率和最好的PAE分別為24.3 dBm以及7.7 %。 最後，我們提出了一個20.2 GHz的電壓控制震盪器。首先，我們先討論震盪器的基本概念和品質參數的定義。接著，兩種相位雜訊的模型也在此論文中被討論，藉由這兩種模型的解釋，可以對我們這次的設計有所幫助。我們使用0.18微米CMOS製程和GIPD製程來實現這個電路。此壓控震盪器的頻率可調範圍為30.8到33.8 GHz，在1 MHz偏移量下的相位雜訊則為-84.15 dBc/Hz。 | zh_TW |
| dc.description.abstract | Amplifiers and voltage-controlled oscillator play important roles in modern communication systems. We focus on the analysis and design of these two types of circuits in this thesis. Due to the advances of the process technology, the operation frequency of CMOS process is much higher than before. With the advantages of low cost and the ease of integration, many microwave and millimeter-wave circuits which used to be designed and fabricated by III-V technologies are now implemented in CMOS technology. This thesis presents three circuits: a buffer amplifier in 65-nm CMOS process and a transformer-combining power amplifier in 90-nm CMOS process, and a VCO implemented in 0.18-um CMOS process and GIPD is also included.
In this thesis, we discuss the fundamentals of amplifiers. Then we implement a 73-to-84 GHz buffer amplifier in 65-nm CMOS process. The topology is a three-stage common-source amplifier and using lumped elements for matching networks. The total chip area of this amplifier is only 0.18 mm2/0.127 mm2 with pads/without pads. It is under 1 V supply and draws total current of 15 mA. The proposed buffer amplifier has the gain of 18.6±1 dB form 73 to 84 GHz and it provides the gain of 18.6 dB and OP1dB of -1 dBm at 77 GHz. Second, a 24-GHz transformer-combining power amplifier is presented. Before the amplifier design, we discuss about the bias selection of power amplifiers and different matching methodologies. Then we select a 4-way transformer as our output power combiner. The topology is a two-stage cascode circuit. The total chip area is 0.92 mm2. This amplifier provides the gain of 14.1 dB and the OP1dB is 21 dBm. Also, the maximum output power is 24.3 dBm and the maximum PAE is 7.7 % from the measurement results. Finally, a 20.2-GHz voltage-controlled oscillator (VCO) is presented. We discuss the fundamentals of oscillator and the definition of quality factor of first. Then, two models of the phase noise are introduced and are helpful to our design. We implement this VCO in 0.18-um CMOS process and GIPD process. The circuit demonstrates the tuning range from 30.8 to 33.8 GHz and the phase noise of -84.15 dBc/Hz at 1-MHz offset. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-07T18:01:14Z (GMT). No. of bitstreams: 1 ntu-101-R99942010-1.pdf: 4007384 bytes, checksum: 92c4308a4fe18004c332cadd689e9c31 (MD5) Previous issue date: 2012 | en |
| dc.description.tableofcontents | 口試委員會審定書 #
誌謝 i 中文摘要 ii ABSTRACT iii CONTENTS v LIST OF FIGURES ix LIST OF TABLES xiv Chapter 1 Introduction 1 1.1 Research Motivation 1 1.2 Literature Survey 2 1.2.1 Buffer Amplifier 2 1.2.2 Power Amplifier 3 1.2.3 Voltage-Controlled Oscillator 4 1.3 Contributions 5 1.4 Organization of the Thesis 6 Chapter 2 Basics and Design of a 73-to-84GHz Buffer Amplifier in 65-nm CMOS Process 8 2.1 Power Gain 8 2.2 Stability 10 2.2.1 Unconditionally Stable 10 2.2.2 Conditionally Stable 11 2.2.3 Tests for Unconditionally Stable 11 2.3 Types of Matching Methodology 12 2.3.1 Power Matching 12 2.3.2 Noise Matching 13 2.3.3 Conjugate Matching 16 2.4 Non-ideality of Amplifiers at Large Signal Operation Condition 17 2.5 Proposed Amplifier 19 2.5.1 Device Selection 19 2.5.2 Matching Network 23 2.6 Simulation 26 2.7 Experiment Results 28 2.8 Discussion and Summary 30 Chapter 3 24-GHz Transformer-Combined Power Amplifier in 90-nm CMOS Process 31 3.1 Bias of Power Amplifiers 31 3.1.1 Class-A Operation 32 3.1.2 Class-B Operation 33 3.1.3 Class-AB Operation 35 3.2 Basic Concepts of Power Combining 36 3.3 Combining Topologies Proposed in Previous Works 38 3.3.1 Direct Combining 38 3.3.2 Balanced Amplifier 39 3.3.3 Transformer Combining 40 3.3.4 Comparison and Discussion 41 3.4 Proposed Power Amplifier 41 3.4.1 Device Selection 42 3.4.2 Transformer Design 45 3.4.3 Gain Stage Design 51 3.4.4 Odd-Mode Oscillation Suppression 53 3.5 Simulation 56 3.6 Experiment Results 57 3.7 Discussion and Summary 59 Chapter 4 Fundamentals of LC-Tank Voltage-Controlled Oscillator 63 4.1 Introduction 63 4.2 Fundamental Theory of Oscillator 64 4.3 Quality factor of the LC Tank 66 4.4 Theory and Models of Phase Noise 71 4.5 Model of the Inductor 75 4.5.1 Inductance – Ls 76 4.5.2 Series Resistance – Rs 76 4.5.3 Series Capacitor – Cs 77 4.5.4 Substrate Parasitics – Cox, Csub, and Rsub 77 4.6 Varactor 77 4.7 Summary 79 Chapter 5 20.2-GHz Crossed-Coupled Voltage-Controlled Oscillator in 0.18-um CMOS with the Integration of GIPD Process 81 5.1 Relationships between Phase Noise and Q-factor of LC tank 82 5.2 Process Overview 86 5.2.1 TSMC 0.18-um CMOS Process 86 5.2.2 tMt Glass Integrated Passive Device (GIPD) Process 87 5.3 Design of the Proposed Circuit 89 5.3.1 GIPD Inductor and Bumpers 92 5.4 Experiment Results 96 5.5 Discussion and Summary 98 Chapter 6 Conclusions 103 REFERENCE 105 | |
| dc.language.iso | en | |
| dc.subject | 壓控震盪器 | zh_TW |
| dc.subject | 汽車雷達 | zh_TW |
| dc.subject | 玻璃整合被動元件製程 | zh_TW |
| dc.subject | 微波毫米波單晶片 | zh_TW |
| dc.subject | 緩衝放大器 | zh_TW |
| dc.subject | 變壓器結合 | zh_TW |
| dc.subject | 功率放大器 | zh_TW |
| dc.subject | glass integrated passive device (GIPD) | en |
| dc.subject | MMIC | en |
| dc.subject | car radar | en |
| dc.subject | buffer amplifier | en |
| dc.subject | transformer-combining | en |
| dc.subject | power amplifier (PA) | en |
| dc.subject | voltage-controlled oscillator (VCO) | en |
| dc.title | 毫米波放大器與矽基板整合玻璃基板之壓控震盪器之研究與分析 | zh_TW |
| dc.title | Design and Analysis of Millimeter-Wave Amplifiers and Voltage-Controlled Oscillator Using the Integration of Silicon and Glass Substrates Technology | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 100-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 蔡政翰,張嘉展 | |
| dc.subject.keyword | 微波毫米波單晶片,汽車雷達,緩衝放大器,變壓器結合,功率放大器,壓控震盪器,玻璃整合被動元件製程, | zh_TW |
| dc.subject.keyword | MMIC,car radar,buffer amplifier,transformer-combining,power amplifier (PA),voltage-controlled oscillator (VCO),glass integrated passive device (GIPD), | en |
| dc.relation.page | 110 | |
| dc.rights.note | 未授權 | |
| dc.date.accepted | 2012-08-06 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
| 顯示於系所單位： | 電信工程學研究所 | |
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