具低靜態電流之主動式斜坡自適應性導通時間控制降壓轉換器

Abstract

隨著物聯網（IoT）與電池供電裝置之快速發展，電源管理積體電路（Power Management Integrated Circuits, PMICs）在超輕載與待機模式下的能量轉換效率愈發重要。為延長系統電池壽命並降低待機功耗，直流轉換器需在維持穩定輸出與快速暫態響應的同時，大幅降低其靜態電流消耗。本論文提出一款具備超低靜態電流之同步降壓型直流轉換器，結合主動斜坡自適應導通時間控制（Active-Ramp Adaptive On-Time, ARAOT）與 NN 型功率級（N-N power stage）架構，以兼顧超輕載至重載操作範圍內之整體效率表現。

所提出之轉換器之控制架構採用雙轉導斜坡產生機制，透過主動斜坡控制與零交越偵測電路，使系統可於連續導通模式與不連續導通模式間達成平順模式轉換（seamless mode transition），有效抑制傳統 COT 架構中因切換模式所造成的輸出電壓擾動。在重載操作下，所設計之 NN 型功率級可降低導通損耗並提升電源傳輸效率；而於輕載與待機狀態時，藉由雙層級偏壓電流設計與睡眠模式控制策略，大部分電路模組可被關閉，僅保留關鍵維持電路運作，以有效降低系統靜態功耗。

本晶片使用 TSMC 0.18 μm BCD 製程實現。量測結果顯示，在輸入電壓為3.6V，輸出電壓為1.8V且輸出電流介於 10 μA 至 1 A 的廣泛操作範圍內，轉換效率皆可維持於 85% 以上；於超輕載條件（2μA）下，仍可達 70% 以上的轉換效率。此外，負載暫態量測結果顯示本轉換器具備良好的電壓調節能力與快速回復特性。整體實驗結果證實，所提出之架構適用於對超低功耗與高效率皆有高度需求之電池供電應用系統。

With the rapid growth of Internet-of-Things (IoT) and battery-powered applications, power management integrated circuits (PMICs) are increasingly required to achieve high energy conversion efficiency over an extremely wide load current range, especially under ultra-light-load and standby conditions. To extend battery lifetime while maintaining stable output regulation and fast transient response, dc–dc converters must significantly reduce quiescent current without sacrificing heavy-load efficiency. This thesis presents a synchronous buck converter featuring ultra-low quiescent current, which integrates an Active-Ramp Adaptive On-Time (ARAOT) control scheme with an NN-type power stage to achieve high efficiency from ultra-light load to heavy load operation.

The proposed converter control architecture employs a dual-transconductance ramp generation scheme combined with active-ramp control and a calibrated zero-crossing detection (ZCD) circuit, enabling seamless mode transition between continuous conduction mode (CCM) and discontinuous conduction mode (DCM). Compared with conventional constant on-time (COT) based architectures, the proposed ARAOT scheme effectively reduces control voltage shifting during mode transitions, thereby improving transient behavior. At heavy-load conditions, the NN-type power stage minimizes conduction loss and enhances power conversion efficiency, while at light-load and standby conditions, a multi-level bias current scheme and sleep-mode operation are adopted to significantly reduce the overall quiescent current by selectively disabling non-critical circuit blocks.

The proposed converter is fabricated using a TSMC 0.18-μm BCD process. Measurement results demonstrate that the converter achieves over 85% efficiency across a wide load current range from 10 μA to 1 A(VIN=3.6V, VO=1.8V), and maintains over 70% efficiency at an ultra-light load of 2 μA. In addition, the measured load transient responses exhibit good voltage regulation and fast recovery characteristics. These results validate that the proposed architecture is well suited for battery-powered systems requiring both ultra-low power consumption and high efficiency over a wide operating range.