基於振盪測試結構的晶片間互連缺陷之偵測與診斷

Abstract

隨著三維積體電路（3D-IC）與高頻寬記憶體（HBM）系統日益複雜，針對矽穿孔（TSV）之製程缺陷的測試已成為不可或缺的一環。因此，對這些缺陷進行可靠的偵測與診斷，對於確保系統良率與效能至關重要。本研究基於環形振盪器之 DFT 架構，設計了兩種應用於晶片間TSV測試的測試流程。其一為定位流程，用於辨識故障TSV以支援後續修復；其二為診斷流程，進一步區分不同的故障類型。為支援上述流程，我們定義了對應的DFT操作模式，使測試電路能夠配置為不同模式。此外，本研究亦提出相應的定位演算法與診斷演算法，用於分析測試結果。整體方法能有效偵測、精確定位並區分多達兩個TSV缺陷，進一步提升3D-IC晶片間互連測試的可靠性。

As three-dimensional integrated circuits (3D-ICs) and high-bandwidth memory (HBM) systems continue to grow in complexity, testing for process defects induced faults in through-silicon vias (TSVs) has become critical. Reliable detection and diagnosis of these defects are therefore essential to ensure system yield and performance. In this work, we build upon a ring-oscillation-based DFT architecture and propose two test flows for inter-die TSV testing. The fault-locating flow identifies faulty TSVs to enable subsequent repair, while the diagnosis flow further distinguishes among different fault types. To support these flows, we define DFT operation modes that allow configuration of the test structure. In addition, we propose dedicated fault-locating and diagnosis algorithms to analyze the oscillation test results. The proposed methodology enables effective detection, precise fault-locating, and fault-type differentiation of up to two faulty TSVs, enhancing the reliability of inter-die interconnect testing in 3D-ICs.