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標題: | 具雙閘極結構之空乏型及增強型氮化鋁鎵/氮化鎵高電子遷移率電晶體之電性分析 Electrical characteristics of depletion-mode and enhancement-mode AlGaN/GaN HEMTs with a dual-gate structure |
作者: | 林岱頡 Dai-Jie Lin |
指導教授: | 黃建璋 Jian-Jang Huang |
關鍵字: | 氮化鎵,高載子遷移率電晶體,雙閘極結構,電流坍塌現象,反向導通, GaN,HEMT,dual-gate (DG) structure,current collapse,reverse conduction, |
出版年 : | 2023 |
學位: | 博士 |
摘要: | 本論文主要著重於開發具雙閘極結構之空乏型及增強型氮化鎵高電子遷移率電晶體及探究元件可靠性相關之議題,包含元件在高汲極電壓操作下的電流坍塌現象及在反向導通時的元件行為,意即當元件操作在反向導通時的表現。基於氮化鎵高電子遷移率電晶體的高崩潰電壓及高電子遷移率之特性,使得氮化鎵高電子遷移率電晶體具有相當的潛力取代現今矽基材高頻高效率之電源轉換器功率元件,及應用於發展高頻高效率電源轉換器。
當元件在高電壓的高速切換下,元件表面的缺陷態會導致飽和電流的下降並伴隨通道導通電阻的上升。在此部分,我們提出具雙閘極之空乏型氮化鎵高電子遷移率電晶體,以解決及抑制動態電阻的增加。動態電阻的上升起因於在元件高速開關下,通道載子的散失且回復不及。為了瞭解元件的動態表現,進行短脈衝的壓力測試可以萃取元件在快速開關下的特性。元件操作可以藉由施加適當的偏壓在輔助閘極上,進而補償在元件關閉時,通道中損失的電子以減緩元件動態電阻的上升。作為參考基準的單閘極元件,在最低及最高的壓力測試條件下,歸一化的電阻分別為2.78及8.32。然而,對於雙閘極的元件,在輔助閘極電壓為0伏特及汲極電壓為100伏特時,歸一化的電阻為1.87,是所有測試條件中最低的。基於雙閘極的元件結構,動態表現的改善可以歸因於輔助電極感應了額外電子進而補充因快速切換下在通道中損失的載子。 對於許多的功率電子應用電路,如同直流變壓器及逆變器,元件在第三象限的操作表現就顯得至關重要。在第三象限的操作下,元件需要具有較低的反向汲極-源極電壓以降低導通損耗。然而,一般的氮化鎵高電子遷移率電晶體在第三象限的操作下,會擁有較高的壓降進而導致較高的功率耗損。為了改善這個現象,我們提出增強型且具雙閘極結構的元件,以增強元件反向導通的能力。元件透過靠近源極的閘極進行操作,並在靠近汲極的輔助閘極施加一固定偏壓,在這樣的元件結構及操作條件下,元件可以擁有極低的反向導通電壓,最低可以達到 -0.16伏特,除此之外,與單閘極元件相比,反向導通的功耗降低了百分之八十九。反向導通能力的增強可以歸因於在此架構下,元件在汲極電極及輔助閘極間提供了一個電流續流路徑。該路徑有助於有效地消除因元件操作在第三象限下所儲存的電荷,從而顯著降低反向導通的損耗。 This dissertation focuses on developing the depletion-mode (D-mode) and enhancement-mode (E-mode) gallium nitride (GaN) high-electron-mobility-transistors (HEMTs) with a dual-gate structure and investigating the reliability issues, such as current collapse phenomena under a high drain voltage operation and the behavior in the reverse conduction mode, i.e., third quadrant operation. Due to the advantages of high breakdown voltage (VBR) and high electron mobility, GaN HEMTs can potentially replace Si-based power devices for high-frequency, high-efficiency, and switching mode power supplies. Surface traps in GaN HEMTs are known to cause an increase in channel on-resistance (Ron) and a decrease of saturation current. The phenomenon becomes more severe when the transistors are operated during high-frequency and high-voltage switching. In this part, D-mode devices are proposed with a dual-gate structure to address and suppress the increase of dynamic on-resistance. The increase of the dynamic Ron arises from the trapping of electrons resulting in the loss of electrons in the channel. To benchmark the performance of the proposed dual-gate HEMT structure, the stress tests using short pulses to extract their dynamic electrical properties are conducted. The channel carrier losses can be compensated by applying a proper fixed voltage to the auxiliary gate in order to overcome the channel carrier loss when the main gate is switched off. The normalized Ron of the single-gate HEMT at the least and at the most stressed condition is 2.78 and 8.32, respectively. Whereas, for the dual-gate HEMT structure the lowest normalized Ron is 1.87 that indicates a significant mitigation of current collapse under an appropriate bias of 0 V applied to the auxiliary gate electrode on the left and the drain voltage of 100 V. The physical mechanism responsible for this improvement is attributed to the charge distribution in the channel, which is due to the additional electrons induced by the auxiliary gate. For various power applications, such as synchronous DC-DC converters and inverters, the operation in the third quadrant is crucial. The device operation in the third quadrant necessitates a low drain-source voltage (VDS)-drop to minimize the conduction losses. Unfortunately, conventional GaN HEMTs exhibit a higher voltage drop when the gate is off, leading to a higher power loss. To overcome this challenge, the proposed E-mode dual-gate HEMT design aims to enhance the reverse conduction ability. The proposed device is modulated by the main gate electrode located adjacent to the source, and a fixed bias is applied to the auxiliary gate electrode near the drain contact. Through this arrangement, we achieved a remarkably low reverse conduction voltage, reaching as low as -0.16 V with an impressive 89.03% reduction in reverse conduction power loss as compared to the single-gate HEMT. The improvement can be attributed to the establishment of a freewheeling path between the drain electrode and the auxiliary gate. This path facilitates the efficient dissipation of stored charges, resulting in the notable reduction of reverse conduction losses. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/91736 |
DOI: | 10.6342/NTU202304176 |
全文授權: | 同意授權(全球公開) |
顯示於系所單位: | 光電工程學研究所 |
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