氮化鎵高電子遷移率電晶體其電特性分析及可靠度探討

Abstract

III-V族材料氮化鎵近年來應用在功率元件越來越被重視，其中氮化鋁鎵/氮化鎵高電子遷移率電晶體更為代表。高能帶的材料特性能使其應用於高電壓電子元件及高效率電源轉換系統；異質接合結構所產生的大量二維電子氣，更能提供元件大電流、低阻抗之特性。本論文致力於大電流氮化鎵高電子遷移率電晶體之發展以及其動態電特性分析與可靠度探討。 在本論文中，根據先前氮化鋁鎵/氮化鎵高電子遷移率電晶體的實驗經驗，利用p型氮化鎵覆蓋層達到增強型操作元件。我們探討不同閘極金屬對於p型氮化鎵增強型高電子遷移率電晶體之影響，於p型氮化鎵覆蓋層之結構下，可以利用選擇不同功函數之閘極金屬作為再調整電晶體電特性之依據。除此之外，本文發展大尺寸增強型氮化鎵高電子遷移率電晶體以作為大電流功率元件。這些功率元件是由多指狀結構所製成，文中所呈現的兩種增強型功率元件分別是由空乏型大尺寸氮化鎵高電子遷移率電晶體串接矽功率元件以及p型氮化鎵覆蓋層架構。兩種功率元件都能操作達6安培的輸出電流。 本論文同時也探討電流坍塌現象於p型氮化鎵高電子遷移率電晶體之影響。利用電漿輔助化學氣相沉積系統所沉積出的二氧化矽薄膜作為電晶體的鈍化層，藉此探討電流坍塌現象的影響與機制。實驗發現擁有鈍化層的電晶體有較優異的電流坍塌抗性。別於傳統文獻所使用的表面缺陷修復或者增強閘極的控制電場之方式，本文所提出另一種嶄新的方式可以有效降低流坍塌現象。鈍化層的內部缺陷可以作為一個額外的電子累積空間，藉此，二維電子氣之載子便不會被所累積在p型氮化鎵覆蓋層的電子影響，電流坍塌現象便不會產生。

In recent years, the application of gallium nitride (GaN) material have become more and more important, especially in power electronics. Among them, GaN-based high electron mobility transistor (HEMT) is a promising power device. Due to the wide-band-gap material and two dimensional electron gas (2DEG) channel, GaN HEMTs have a high breakdown voltage, large operating output current and low on-resistance. In this thesis, large-area GaN HEMTs with high output current are demonstrated; the electrical characteristics and reliability on performances are also investigated. Based on our previous experience of GaN HEMT, enhancement-mode (E-mode) HEMT are achieved by p-type doped GaN cap AlGaN/GaN structure. To optimize the performance of devices, the impact of various gate metals is discussed. Then, large-area GaN HEMTs as power device are investigated. The large-area HEMT is a multi-finger structure and two types of E-mode large-area HEMTs are fabricated, including cascode HEMT and p-GaN HEMT. Both of them can be operated with a high output drain current of more than 6 A. However, the phenomenon of current collapse remains a critical problem in GaN HEMT. In this work, the phenomenon of current collapse in E-mode HEMT is investigated. Dynamic output characteristics are analyzed between the conventional p-GaN HEMT and the HEMT with PECVD SiO2 as the passivation. Unlike general literatures that remove the interface defects to ease current collapse or enhance the control of gate electrode, this work provides another consideration that an extra electron-accumulating space is created by passivation. This can provide a second region where the electrons would not deplete the 2DEG carriers. The effect of current collapse can be eliminated.