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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電機工程學系
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/41897
標題: 最佳化MPEG-4和H.264的視訊編碼
Optimization of Video Codec for MPEG-4 and H.264
作者: Shih-Chia Huang
黃士嘉
指導教授: 郭斯彥
關鍵字: H.264,MPEG-4,視訊編碼,錯誤隱藏,記憶體管理,
H.264,MPEG-4,Video Codec,Error Concealmet,Memory Management,
出版年 : 2009
學位: 博士
摘要: 我們提出四個主題,關於在視訊解壓縮端的「空間錯誤隱藏法」、「時間錯誤隱藏法」、「混合錯誤隱藏法」和視訊壓縮端的「記憶體管理方法」。
在高壓縮的視訊串流中,若是網路不穩定就會造成資料的流失。為了避免視覺上非常嚴重的影響,在解壓縮端使用錯誤隱藏就非常的必要,尤其是在無線的傳輸時更容易發生資料的遺失。「空間錯誤隱藏法」對恢復受損的影像串列非常有用,尤其場景轉變、不規則的移動和物體的突然消失和出現。當錯誤發生在第一張畫面時,就必須需要「空間錯誤隱藏法」,以免後面的畫面也遭受到影響。我們提出兩個「空間錯誤隱藏法」,一個是可以用在任何的狀況,另一個用加速方法,使用在外部編碼區塊。「時間錯誤隱藏法」非常成功的在高度相關的連續影像畫面。我們提出的創新的數學模組「最佳回歸平面」去修復受損的移動向量和在移動向量中,使用「拉普拉斯分類模組」去決定不同的區塊大小。我們也提出整合的「混合錯誤隱藏法」,包含「空間錯誤隱藏法」和「時間錯誤隱藏法」。實驗證明我們所提出的「混合錯誤隱藏法」充分的使用各種所提出的「錯誤隱藏法」,並適時做完美的偵測與切換。我們的「混合錯誤隱藏法」比傳統的方法好上10.62dB。
在嵌入式的視訊編碼中,移動評估的記憶體頻寬是最重要的設計考量。我們在壓縮端提出一個很有效且創新方法記憶體頻寬的減少方法,使用「資料預測和資料重複使用」的技術。傳統的資料重複使用技術,減少記憶體頻寬和所需的減少內部記憶體只能二選一。透過「資料預測和資料重複使用」的技術,我們同時減少記憶體頻寬和所需的內部記憶體的大小。實驗結果顯示使用「資料預測和資料重複使用」的方法,記憶體頻寬只需原本的百分之三十七、內部記憶體的大小只需原本的百分之七。
We propose four topics in terms of the spatial error concealment, temporal error concealment, hybrid error concealment approaches at the video decoder and memory management (MM) schemes at the video encoder.
Highly compressed video bitstreams transmitted over error-prone communications networks can suffer from packet erasures. In order to avoid error-catalyzed artifacts from producing visible corruption of affected video frames, the use of error concealment (EC) at the video decoder becomes essential, especially in regard to wireless video transmission which can suffer packet loss more easily due to fluctuating channel conditions. Spatial error concealment (SEC) techniques are very useful in the recovery of impaired video sequences, especially in the presence of scene changes, irregular motion, and appearance or disappearance of objects. As errors occur in the first frame, the corrupted MBs must be recovered by utilizing SEC schemes in order to prevent the propagation of errors to the succeeding inter-coded frames. We propose two SEC methods; one conceals the variances of the different kinds of damaged Macroblocks (MBs) targeted at any condition, and the other is speed-up which utilizes a H.264 coding tool, directional spatial intra prediction, in order to conceal the entire spectrum of damaged MBs targeted at intra-coded block(s). Temporal error concealment techniques (TEC) are usually successful when there is continuous high correlation between the frames of the coded sequence. The proposed TEC techniques consist of a novel and unique mathematical model, the optimum regression plane, developed for the repair of damaged motion vectors, and the creation of a framework to perform the variable block size motion compensation based on predictive motion vectors in Laplacian distribution model space for H.264 decoder. We also propose an integrated Hybrid Error Concealment method consisting of both SEC and TEC techniques. Experiments performed using the proposed hybridization method of combining the above spatial and temporal estimation elements fulfilled the expectations of control-whole-scheme. The experimental results show that the proposed method offers excellent gains of up to 10.62dB compared to that of the Joint Model (JM) decoder for a wide range of benchmark sequences without any considerable increase in time demand.
The external memory bandwidth for motion estimation is the most critical issue for the limited memory bandwidth and power consumption in the embedded video coding systems. The purpose of this paper is to propose an efficient and innovative memory bandwidth reduction scheme for the video encoder, using the data prediction and data reuse technique. Compared to those of traditional data reuse schemes for fast motion estimation, there is always a tradeoff between the reduction of memory bandwidth and the required internal memory size. Taking advantage of the function of the proposed data prediction and data reuse techniques for fast motion estimation, we significantly reduced the required memory bandwidth and internal memory size. Experiments performed using the proposed enhanced data prediction and data reuse scheme resulted in excellent gains, in some instances only using 37% of external memory bandwidth and 7% of internal memory size compared to the traditional data reuse scheme.
URI: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/41897
全文授權: 有償授權
顯示於系所單位:電機工程學系

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