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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 李坤彥 | zh_TW |
| dc.contributor.advisor | Kung-Yen Lee | en |
| dc.contributor.author | 盧采裴 | zh_TW |
| dc.contributor.author | Tsai-Pei Lu | en |
| dc.date.accessioned | 2025-09-17T16:14:47Z | - |
| dc.date.available | 2025-09-18 | - |
| dc.date.copyright | 2025-09-17 | - |
| dc.date.issued | 2025 | - |
| dc.date.submitted | 2025-08-08 | - |
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| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/99644 | - |
| dc.description.abstract | 隨著電動車與再生能源等高功率應用迅速發展，具備高壓、高溫與高頻操作能力的碳化矽 (SiC) 功率元件已成為次世代能源轉換技術的關鍵。然而，SiC MOSFET 的長期可靠度仍受限於其氧化層與介面缺陷問題，特別是在高溫閘極偏壓 (HTGB) 與熱循環應力 (PCT) 條件下，易產生閾值電壓漂移、導通電阻上升與閘極電容變化等現象。
本研究選用三種結構不同的1200V平面型SiC MOSFET元件，透過長時間HTGB與直流功率循環測試，系統性分析包括Vth、Rds,on、VSD、Cg–Vg、VFB與Qg等電性參數之劣化行為。結果顯示，正HTGB造成電子陷阱累積，導致Vth上升與Cg–Vg右移，而負HTGB則呈現Vth初升後下降的雙階段機制，反映電洞捕獲與電荷釋放的交互影響。PCT測試中，元件因熱–機械應力交互應力產生明顯的Rds,on增加與Vth漂移，且結構設計如通道長度 (Lch) 、側壁寬度 (Sidewall) 與源極接觸重疊 (Lcont) 對劣化程度具明確關聯。 研究結果不僅揭示SiC MOSFET在靜態與動態應力下的退化行為，亦建立了結構參數與可靠度表現之對應關係。此成果可作為未來高可靠度元件設計與壽命預測的實證基礎，對於車用、高頻與極端環境應用中之SiC元件開發具高度參考價值。 | zh_TW |
| dc.description.abstract | With the rapid growth of electric vehicles and renewable energy systems, Silicon Carbide (SiC) power MOSFETs have emerged as essential components due to their superior high-voltage, high-temperature, and high-frequency capabilities. However, long-term reliability remains a critical challenge, particularly under High-Temperature Gate Bias (HTGB) and Power Cycling Test (PCT) conditions, where gate oxide degradation and interface instability can induce threshold voltage shifts, increased on-resistance, and altered gate capacitance.
This work investigates the degradation behaviors of three 1200 V planar SiC MOSFETs with varying structural parameters under prolonged HTGB and PCT stresses. Key electrical characteristics including Vth, Rds,on, VSD, Cg–Vg, VFB, and Qg were analyzed. Under positive HTGB, electron trapping causes Vth increase and Cg–Vg right-shift, while negative HTGB reveals a two-stage Vth behavior driven by hole capture and interface charge release. PCT results indicate stress-induced Rds,on increase and Vth drift due to thermal–mechanical fatigue, with structural factors such as channel length (Lch), sidewall width, and source contact length (Lcont) playing critical roles in degradation severity. The findings provide a comprehensive correlation between device structure and reliability performance under combined electrical and thermal stresses. This study not only clarifies key degradation mechanisms but also offers practical guidelines for future SiC MOSFET design targeting high-reliability automotive and high-frequency applications. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2025-09-17T16:14:47Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2025-09-17T16:14:47Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | 誌謝 i
中文摘要 ii Abstract iii 目次 v 圖次 viii 表次 xi 第一章、緒論 1 1.1 研究背景 1 1.2 碳化矽 (SiC) 材料特性 1 1.2.1 SiC 相較於 Si 的優勢 2 1.2.2 SiC 的挑戰與可靠度問題 3 1.3 論文架構 3 1.4 研究動機與目的 4 第二章、文獻回顧與理論基礎 6 2.1 SiC Power MOSFET元件原理 6 2.1.1 結構介紹 6 2.1.2 導通與關斷操作原理 7 2.1.3 閘極電容－電壓特性 (Cg-Vg) 12 2.1.4 閘極電荷與切換行為特性 (Qg) 17 2.2 高溫閘極偏壓測試 (HTGB) 規範與文獻回顧 19 2.2.1 HTGB測試規範 20 2.2.2 HTGB文獻回顧 20 2.3 直流功率循環測試 (PCT) 原理與應用 22 2.3.1 PCT測試規範 22 2.3.2 PCT文獻回顧 23 第三章、實驗元件與測試方法 25 3.1 測試元件介紹 25 3.2 基本靜態與動態測量方法 28 3.2.1 閾值電壓 (Vth) 28 3.2.2 導通電阻 (Rds,on) 29 3.2.3 第三象限導通電壓 (VSD) 30 3.2.4 閘極電容特性 (Cg–Vg) 與平帶電壓 (VFB) 31 3.2.5 總閘極電荷 (Qg) 33 3.3 高溫閘極偏壓測試 (HTGB) 方法 35 3.3.1 正閘極偏壓條件 (+HTGB) 37 3.3.2 負閘極偏壓條件 (−HTGB) 37 3.4 直流功率循環測試 (PCT) 方法 38 第四章、HTGB測試結果與分析 40 4.1 元件結構與初始電性 40 4.2 閾值電壓 (Vth) 變化分析 42 4.2.1 正 HTGB 下的 Vth 變化分析 42 4.2.2 負 HTGB 下的 Vth 變化分析 45 4.3 導通電阻 (Rds,on) 變化分析 47 4.3.1 正HTGB 下的 Rds,on 變化分析 49 4.3.2 負HTGB 下的 Rds,on 變化分析 52 4.4 第三象限導通電壓 (VSD) 變化分析 55 4.4.1 正HTGB 下的 VSD 變化分析 55 4.4.2 負HTGB 下的 VSD 變化分析 57 4.5 Cg–Vg特性變化分析 59 4.6 閘極電荷 (Qg) 變化分析 64 4.7 總結與機制分析 69 第五章、直流功率循環測試 (PCT) 結果與分析 73 5.1 元件結構與初始電性 73 5.2 閾值電壓 (Vth) 變化分析 74 5.3 導通電阻 (Rds,on) 變化分析 76 5.4 總結與機制分析 79 第六章、結論及未來展望 82 6.1 結論 82 6.2 未來展望 83 參考文獻 85 | - |
| dc.language.iso | zh_TW | - |
| dc.subject | 碳化矽 | zh_TW |
| dc.subject | 平面式金氧半場效電晶體 | zh_TW |
| dc.subject | 閘極氧化層 | zh_TW |
| dc.subject | 高溫閘極偏壓 | zh_TW |
| dc.subject | 功率循環測試 | zh_TW |
| dc.subject | 閥值電壓 | zh_TW |
| dc.subject | 導通電阻 | zh_TW |
| dc.subject | Power MOSFET | en |
| dc.subject | On-Resistance (Rds | en |
| dc.subject | Threshold Voltage (Vth) | en |
| dc.subject | Power Cycling Test (PCT) | en |
| dc.subject | High-Temperature Gate Bias (HTGB) | en |
| dc.subject | Gate Oxide | en |
| dc.subject | Silicon Carbide (SiC) | en |
| dc.subject | on) | en |
| dc.title | 不同結構參數調變之碳化矽平面金氧半場效電晶體於高溫閘極偏壓下之電性參數分析 | zh_TW |
| dc.title | Electrical Parameters Analysis of SiC Planar MOSFET with Structural Variations under High-Temperature Gate Bias Stress | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 113-2 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 胡振國;張瑞益 | zh_TW |
| dc.contributor.oralexamcommittee | Jenn-Gwo Hwu;Ray-I Chang | en |
| dc.subject.keyword | 碳化矽,平面式金氧半場效電晶體,閘極氧化層,高溫閘極偏壓,功率循環測試,閥值電壓,導通電阻, | zh_TW |
| dc.subject.keyword | Silicon Carbide (SiC),Power MOSFET,Gate Oxide,High-Temperature Gate Bias (HTGB),Power Cycling Test (PCT),Threshold Voltage (Vth),On-Resistance (Rds,on), | en |
| dc.relation.page | 90 | - |
| dc.identifier.doi | 10.6342/NTU202503743 | - |
| dc.rights.note | 未授權 | - |
| dc.date.accepted | 2025-08-12 | - |
| dc.contributor.author-college | 工學院 | - |
| dc.contributor.author-dept | 工程科學及海洋工程學系 | - |
| dc.date.embargo-lift | N/A | - |
| 顯示於系所單位： | 工程科學及海洋工程學系 | |
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