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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電子工程學研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/97592
完整後設資料紀錄
DC 欄位值語言
dc.contributor.advisor陳景然zh_TW
dc.contributor.advisorChing-Jan Chenen
dc.contributor.author林庭佑zh_TW
dc.contributor.authorTing-You Linen
dc.date.accessioned2025-07-03T16:09:20Z-
dc.date.available2025-07-04-
dc.date.copyright2025-07-03-
dc.date.issued2025-
dc.date.submitted2025-06-10-
dc.identifier.citation[1] G. Cai, Y. Lu and R. P. Martins, "An SC-Parallel-Inductor Hybrid Buck Converter With Reduced Inductor Voltage and Current," IEEE J. Solid-State Circuits, vol. 58, no. 6, pp. 1758-1768, June 2023.
[2] K. Hata, S. Tanaka, Y. Rikiishi and T. Matsumoto, "48 V-to-12 V Always-Dual-Path Hybrid DC-DC Converter for Inductor Current Reduction," in Proc. IEEE Energy Convers. Congr. Expo., Detroit, MI, USA, Oct. 2022, pp. 1-6.
[3] J. -Y. Ko, Y. Huh, M. -W. Ko, G. -G. Kang, G. -H. Cho and H. -S. Kim, "A 4.5V-Input 0.3-to-1.7V-Output Step-Down Always-Dual-Path DC-DC Converter Achieving 91.5%-Efficiency with 250mΩ-DCR Inductor for Low-Voltage SoCs," in Proc. Symp. VLSI Circuits, Jun. 2021, pp. 1-2.
[4] C. Wang, Y. Lu and R. P. Martins, "A Highly Integrated Tri-Path Hybrid Buck Converter With Reduced Inductor Current and Self-Balanced Flying Capacitor Voltage," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 69, no. 9, pp. 3841-3850, Sept. 2022.
[5] K. Hata, Y. Jiang, M. -K. Law and M. Takamiya, "Always-Dual-Path Hybrid DC-DC Converter Achieving High Efficiency at Around 2:1 Step-Down Ratio," in Proc. IEEE Appl. Power Electron. Conf. Expo. (APEC), Jun. 2021, pp. 1302-1307.
[6] K. Hata, Y. Yamauchi, T. Sai, T. Sakurai and M. Takamiya, "48V-to-12V Dual-Path Hybrid DC-DC Converter," in Proc. IEEE Appl. Power Electron. Conf. Expo. (APEC), Mar. 2020, pp. 2279-2284.
[7] Erickson, R. W., & Maksimovic, D. (2001). Fundamentals of Power Electronics. Springer Science+Business Media.
[8] X. Liu, P. K. T. Mok, J. Jiang and W. -H. Ki, "Analysis and Design Considerations of Integrated 3-Level Buck Converters," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 63, no. 5, pp. 671-682, May 2016.
[9] S. -U. Shin, S. -W. Hong, H. -M. Lee and G. -H. Cho, "High-Efficiency Hybrid Dual-Path Step-Up DC–DC Converter With Continuous Output-Current Delivery for Low Output Voltage Ripple," IEEE Trans. Power Electron., vol. 35, no. 6, pp. 6025-6038, June 2020.
[10] T. Hu, M. Huang, Y. Lu and R. P. Martins, "A 4A 12-to-1 Flying Capacitor Cross-Connected DC-DC Converter with Inserted D>0.5 Control Achieving >2x Transient Inductor Current Slew Rate and 0.73× Theoretical Minimum Output Undershoot of DSD," in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Mar. 2022, pp. 1-3.
[11] Z. Tang, M. Huang, R. P. Martins and Y. Lu, "An Emulated Peak/Valley Curve Assisted Fast-Transient Buck Converter Achieving Precise One-Cycle Charge Balance with One-Parameter Calibration," in Proc. IEEE Custom Integr. Circuits Conf. (CICC), Apr. 2024, pp. 1-2.
[12] Z. Ye, Y. Lei, W. -C. Liu, P. S. Shenoy and R. . Pilawa-Podgurski, "Improved Bootstrap Methods for Powering Floating Gate Drivers of Flying Capacitor Multilevel Converters and Hybrid Switched-Capacitor Converters," IEEE Trans. Power Electron., vol. 35, no. 6, pp. 5965-5977, June 2020.
[13] N. M. Ellis, R. Iyer and R. C. N. Pilawa-Podgurski, "A Synchronous Boot-strapping Technique with Increased On-time and Improved Efficiency for High-side Gate-drive Power Delivery," in Proc. IEEE Workshop Wide Bandgap Power Devices and Appl. Asia, 2021, pp. 462-466.
[14] J. Liu, S. Shan, J. Pan and B. Li, "Pre-charge Control Strategy of Three-level Converter Based on Flying Capacitor," in Proc. IEEE/IAS Ind. and Commercial Power Syst. Asia, Jul. 2022, pp. 287-291.
[15] Xin Zhou, Jiwei Fan and A. Huang, "Monolithic dc offset self-calibration method for adaptive on-time control buck converter," in Proc. IEEE Energy Convers. Congr. Expo., San Jose, CA, USA, 2009, pp. 655-658.
[16] C. Chang, "Combined lossless current sensing for current mode control," in Proc. 19th Annu IEEE Appl. Power Electron. Conf. Expo., Anaheim, CA, USA, Nov. 2004, pp. 404-410.
[17] N. K. Hoang, Sang-gug Lee and Young-Jin Woo, "A zero current detector with low negative inductor current using forced freewheel switch operation in synchronous DC-DC converter," EEE International Conference on Communications and Electronics (ICCE), p. 318-322, July 2014.
[18] R. B. Ridley, "A new, continuous-time model for current-mode control (power convertors)," IEEE Trans. Power Electron., vol. 6, no. 2, pp. 271-280, April 1991.
[19] R. B. Ridley, "A new continuous-time model for current-mode control with constant frequency, constant on-time, and constant off-time, in CCM and DCM," IEEE Power Electronics Specialists Conference proceedings, pp. 382-389, 1990-June-11-14.
[20] C. -J. Tsai, H. -H. Chen and C. -J. Chen, "A 2 μ A Iq Passive-Ramp-Adaptive-Extended-TON Controlled Buck Converter Leveraging Clamped Adaptive Biased Error Amplifier to Achieve DVS/Load Transient One-Cycle Recovery Time," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 71, no. 11, pp. 4924-4936, Nov. 2024.
[21] B. Razavi, “Design of Analog CMOS Integrated Circuits,” McGraw Hill, New York, 2001.
[22] Sedra, A.S. and Smith, K.C. (2004). Microelectronic Circuits. 5th Edition, Oxford University Press, New York, 509.
[23] W. -C. Liu, P. Assem, Y. Lei, P. K. Hanumolu and R. Pilawa-Podgurski, "10.3 A 94.2%-peak-efficiency 1.53A direct-battery-hook-up hybrid Dickson switched-capacitor DC-DC converter with wide continuous conversion ratio in 65nm CMOS," in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2017, pp. 182-183.
[24] Y. Karasawa, T. Fukuoka and K. Miyaji, "A 92.8% Efficiency Adaptive-On/Off-Time Control 3-Level Buck Converter for Wide Conversion Ratio with Shared Charge Pump Intermediate Voltage Regulator," in Proc. Symp. VLSI Circuits, Jun. 2018, pp. 227-228.
[25] Z. Xia and J. Stauth, "17.1 A Two-Stage Cascaded Hybrid Switched-Capacitor DC-DC Converter with 96.9% Peak Efficiency Tolerating 0.6V/μs Input Slew Rate During Startup," in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2021, pp. 256-258.
[26] W. Jung et al., "A 95.4% Hybrid Always-Dual-Path Recursive Step-Down Converter Using Adaptive Switching Level Control With 288 mΩ Large-DCR Inductor," IEEE Trans. Power Electron., vol. 39, no. 2, pp. 2258-2269, Feb. 2024.
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dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/97592-
dc.description.abstract本論文提出一種具自適應導通時間控制的 Pi 型雙路混合降壓型轉換器,旨在解決可攜式與穿戴式裝置中,實現高電流密度與寬負載範圍下高效率的挑戰。所提出的 Pi 型雙路混合降壓型轉換器繼承了先前雙路混合降壓型轉換器拓撲在降低電感器電流的優勢,同時解決了與不連續導通模式相關的關鍵問題,如不準確的零電流檢測和飛輪電容器漏電問題。由於飛行電容器可自我平衡,消除了額外控制電路的需求,並確保在三個操作模式中都能穩定運行。具自適應導通時間控制使得在不連續導通模式中實現脈衝頻率調變,在連續導通模式中則保持固定頻率,使得輕負載和重負載條件下均能保持高效率。該轉換器使用台積電 0.18 μm HV CMOS(T18HVG2)製程製作,並在連續導通模式中以 1.1 MHz的切換頻率運行,在不連續導通模式中則具有可變頻率。測量結果表明,該轉換器在 10 mA 至 1.2 A 的廣泛輸出電流範圍內,效率均超過 80%。該轉換器可提供 3.6 V 至 4.2 V 的輸入電壓範圍,0.6 V 至 1.0 V 的輸出電壓範圍,並且能處理高達 1.5 A 的輸出電流,同時使用尺寸為 2.00 mm × 1.25 mm × 1.00 mm 的小型功率電感器。與先前的研究相比,該設計實現了優越的負載電流動態範圍(150 倍)和最高的電流密度,證明其在高性能、空間受限的應用中的適用性。zh_TW
dc.description.abstractThis thesis proposes a Pi-Type Dual-Path Buck (PTDP-Buck) converter with adaptive on-time (AOT) control, aiming to address the challenge of achieving high current density and high efficiency across a wide load range in portable and wearable devices. The PTDP-Buck converter inherits the low inductor current advantages of previous dual-path buck (DP-Buck) topologies while resolving critical issues associated with discontinuous conduction mode (DCM), such as inaccurate zero current detection (ZCD) and flying capacitor leakage. Due to the self-balancing ability of the flying capacitor, the need for additional control circuitry is eliminated, ensuring stable operation across all three operating modes. AOT control enables pulse frequency modulation (PFM) in DCM and fixed-frequency in continuous conduction mode (CCM), maintaining high efficiency under both light and heavy load conditions. Fabricated using the TSMC 0.18 μm HV CMOS (T18HVG2) process, the converter operates at 1.1 MHz switching frequency in CCM and with a variable frequency in DCM. Measurement results demonstrate an efficiency exceeding 80% across a wide output current range from 10 mA to 1.2 A. The converter supports input voltages from 3.6 V to 4.2 V, output voltages from 0.6 V to 1.0 V, and output currents up to 1.5 A, all while using a small 2.00 mm × 1.25 mm × 1.00 mm power inductor. Compared with prior works, this design achieves a superior load current dynamic range (150×) and the highest current density, confirming its suitability for high-performance, space-constrained applications.en
dc.description.provenanceSubmitted by admin ntu (admin@lib.ntu.edu.tw) on 2025-07-03T16:09:20Z
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dc.description.provenanceMade available in DSpace on 2025-07-03T16:09:20Z (GMT). No. of bitstreams: 0en
dc.description.tableofcontents誌謝 I
中文摘要 III
Abstract IV
Table of Contents V
List of Figure VII
List of Table XII
Chapter 1 Introduction 1
1.1 Background 1
1.2 Prior Works 2
1.3 Thesis Proposal and Contributions 5
1.4 Chip Design Goal 8
1.5 Thesis Outline 8
Chapter 2 Analysis of the Pi-Type Dual-Path Buck Converter 9
2.1 PTDP-Buck Converter CCM Steady State Analysis 9
2.2 PTDP-Buck Converter CCM Small Signal Analysis 18
2.3 PTDP-Buck Converter DCM Steady State Analysis 23
2.4 PTDP-Buck Converter Fast Transient Mode 28
2.5 PTDP-Buck Converter MOS-Level Topology 29
2.6 PTDP-Buck Converter Pre-Charge Technique 31
2.7 Power Stage Topology Comparison 32
Chapter 3 Pi-Type Dual-Path Buck Converter with Adaptive On-Time Control 35
3.1 Overall Circuit 35
3.2 DCR Current Sensing Method 36
3.3 Adaptive On-Time Generator Circuit 37
3.4 Zero Current Detection Circuit 40
3.5 Frequency Domain Analysis 41
3.6 Type II Compensator Circuit with Clamping Technique 45
3.7 MOS-Level Circuit Implementation 48
3.8 Simulation Waveform of Overall Circuit 54
Chapter 4 Measurements Results 58
4.1 Chip Overview 58
4.2 Full Circuit PCB Design and Experimental Platform 62
4.3 Experimental Result 67
Chapter 5 Conclusions and Future works 78
5.1 Conclusions 78
5.2 Future Works 80
Reference 82
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dc.language.isoen-
dc.subject雙路混合降壓型轉換器zh_TW
dc.subject脈衝頻率調變zh_TW
dc.subject不連續導通模式zh_TW
dc.subject高效率zh_TW
dc.subject高電流密度zh_TW
dc.subject自適應導通時間控制zh_TW
dc.subjecthigh efficiencyen
dc.subjecthigh current densityen
dc.subjectDual-Path Buck converteren
dc.subjectadaptive on-time controlen
dc.subjectPFMen
dc.subjectDCMen
dc.title可兼容 DCM 之 具自適應導通時間控制的 Pi 型雙路混合降壓轉換器zh_TW
dc.titleA DCM Compatible Pi-Type Dual-Path Hybrid Buck Converter with Adaptive On-Time Controlen
dc.typeThesis-
dc.date.schoolyear113-2-
dc.description.degree碩士-
dc.contributor.oralexamcommittee黃育賢;黃顗融;陳耀銘zh_TW
dc.contributor.oralexamcommitteeYuh-Shyan Hwang;Yi-Rong Huang;Yaow-Ming Chenen
dc.subject.keyword自適應導通時間控制,雙路混合降壓型轉換器,高電流密度,高效率,不連續導通模式,脈衝頻率調變,zh_TW
dc.subject.keywordadaptive on-time control,Dual-Path Buck converter,high current density,high efficiency,DCM,PFM,en
dc.relation.page84-
dc.identifier.doi10.6342/NTU202501085-
dc.rights.note同意授權(全球公開)-
dc.date.accepted2025-06-10-
dc.contributor.author-college電機資訊學院-
dc.contributor.author-dept電子工程學研究所-
dc.date.embargo-lift2028-06-09-
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