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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/97533完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 陳怡然 | zh_TW |
| dc.contributor.advisor | Yi-Jan Chen | en |
| dc.contributor.author | 蔡承翰 | zh_TW |
| dc.contributor.author | Cheng-Han Tsai | en |
| dc.date.accessioned | 2025-07-02T16:20:14Z | - |
| dc.date.available | 2025-07-03 | - |
| dc.date.copyright | 2025-07-02 | - |
| dc.date.issued | 2025 | - |
| dc.date.submitted | 2025-06-11 | - |
| dc.identifier.citation | Wikipedia, ( 2024, December 7 ), Spark-gap transmitter, Retrieved from https://en.wikipedia.org/wiki/Spark-gap_transmitter.
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| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/97533 | - |
| dc.description.abstract | 本論文提出以氮化鎵製程設計的J級射頻功率放大器以及以橫向擴散金屬氧化物半導體製程(LDMOS)所設計AB級射頻功率放大器,前者為IC,後者則為PCB 模組,兩者的供電都為28 V。在J級射頻功率放大器的部分設計了兩個版本的晶片,第一顆晶片的量測結果為fail,在對第一顆晶片探究問題後,重新設計另一顆放大器的匹配電路,而第二顆晶片的量測分成無散熱片及有加散熱片兩種版本,有加散熱片的量測結果相比於沒加散熱片的結果,在大信號的量測結果上確實有小幅度的提升,在有加上散熱片的PCB的小信號量測結果中,3 dB頻寬約為2.55-4.65 GHz,最大增益為11.44 dB;大信號量測結果中,3 GHz的最大增益為11.89 dB,最大PAE為32.6%,飽和輸出功率為33.7 dBm;4.5 GHz的最大增益為9.3 dB,最大PAE為22.74%,飽和輸出功率為33.71 dBm;5 GHz的最大增益為6.38 dB,最大PAE為8.79%,飽和輸出功率為30.47 dBm。
PCB Module使用了Roger 4003C PCB來設計,電晶體則是使用恩智浦半導體的AFT27S006N 電晶體,並配合其他off-chip被動元件來完成電路設計,其中PCB面積約11.6 cm × 5.6 cm,中心頻率為2.4 GHz,輸出功率最高約能達到40 dBm,最大功率附加效率則約為48.16%,量測到的3dB頻寬約為1.85-2.15 GHz,最大增益則約為20 dB。 | zh_TW |
| dc.description.abstract | This paper presents a class J RF power amplifier designed using GaN technology and a class AB RF power amplifier designed using laterally diffused metal-oxide-semiconductor (LDMOS) technology. The former is an IC, while the latter is a PCB module. Both have a supply voltage of 28 V. For the class J RF power amplifier, two versions of the chip were designed. The first chip fails to work. After investigating the issues with the first chip, the matching circuit of the amplifier was redesigned, and the second chip was tested in two versions: one without a heat sink and the other with a heat sink. The measurement results with the heat sink showed a slight improvement in the large-signal measurement compared to the version without the heat sink. In the small signal measurement results of the PCB with a heatsink, the 3 dB bandwidth is approximately 2.55-4.65 GHz, with a maximum gain of 11.44 dB. In the large signal measurement results, the maximum gain at 3 GHz is 11.89 dB, with a maximum PAE of 32.6% and a saturated output power of 33.7 dBm. At 4.5 GHz, the maximum gain is 9.3 dB, with a maximum PAE of 22.74% and a saturated output power of 33.71 dBm. At 5 GHz, the maximum gain is 6.38 dB, with a maximum PAE of 8.79% and a saturated output power of 30.47 dBm.
The PCB module was designed using Roger 4003C PCB, and the transistor used was NXP Semiconductor's AFT27S006N. The circuit was completed with other off-chip passive components. The PCB area is approximately 11.6 cm × 5.6 cm, with a center frequency of 2.4 GHz. The maximum output power can reach up to 40 dBm, max PAE is about 48.16%, the measured 3 dB bandwidth is approximately 1.85–2.15 GHz, and the maximum gain is about 20 dB. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2025-07-02T16:20:14Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2025-07-02T16:20:14Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | 口試委員會審定書 I
中文摘要 II ABSTRACT III TABLE OF CONTENTS V LIST OF FIGURES VII LIST OF TABLES XVI Chapter 1 Introduction 1 1.1 Research Background and Motivation 1 1.2 Overview of Dissertation and Contributions 6 Chapter 2 Literature Review 9 Chapter 3 GaN Class J Power Amplifier 59 3.1 Background of Class J PA 59 3.2 Design Consideration 65 3.3 1st Chip 68 3.3.1 Overview 68 3.3.2 Design and Simulation 68 3.3.3 Chip and Measurement 104 3.3.4 Discussion 112 3.4 2nd Chip 115 3.4.1 Overview 115 3.4.2 Design and Simulation 115 3.4.3 Chip and Measurement 137 3.4.4 Discussion 150 Chapter 4 Power Amplifier PCB Module 153 4.1 Overview 153 4.2 Design Consideration 154 4.3 Circuit Schematic 154 4.4 Simulation and PCB Layout 163 4.5 Measurement 168 4.6 Discussion 173 Chapter 5 Conclusion 174 REFERENCES 176 | - |
| dc.language.iso | en | - |
| dc.subject | 橫向擴散金屬氧化物半導體 | zh_TW |
| dc.subject | 氮化鎵 | zh_TW |
| dc.subject | 功率放大器 | zh_TW |
| dc.subject | Laterally Diffused Metal-Oxide-Semiconductor (LDMOS) | en |
| dc.subject | Gallium Nitride (GaN) | en |
| dc.subject | Power Amplifier | en |
| dc.title | 氮化鎵J級功率放大器及LDMOS功率放大器模組 | zh_TW |
| dc.title | GaN Class-J Power Amplifier and LDMOS Power Amplifier Module | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 113-2 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 林坤佑;黃天偉;楊濠瞬 | zh_TW |
| dc.contributor.oralexamcommittee | Kun-You Lin;Tian-Wei Huang;Hao-Shun Yang | en |
| dc.subject.keyword | 氮化鎵,功率放大器,橫向擴散金屬氧化物半導體, | zh_TW |
| dc.subject.keyword | Gallium Nitride (GaN),Power Amplifier,Laterally Diffused Metal-Oxide-Semiconductor (LDMOS), | en |
| dc.relation.page | 180 | - |
| dc.identifier.doi | 10.6342/NTU202501101 | - |
| dc.rights.note | 同意授權(限校園內公開) | - |
| dc.date.accepted | 2025-06-11 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 電子工程學研究所 | - |
| dc.date.embargo-lift | 2025-07-03 | - |
| 顯示於系所單位: | 電子工程學研究所 | |
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