一個具有輻射容忍的雙通道連續漸進式類比數位轉換器之設計以及使用短脈衝雷射與質子束進行單粒子事件分析

Abstract

近年來，隨著低軌衛星的興起，如何讓晶片在太空環境下穩健運行成為重要課題。太空環境中的單事件效應對先進製程晶片影響尤為顯著，而類比數位轉換器在衛星通訊與訊號處理中扮演關鍵角色。類比數位轉換器的核心元件比較器在設計中需特別關注其在輻射環境下的表現，同時前端取樣電路和後端數位電路也需具備輻射加固與容忍性，以確保整體系統的穩定運作。 本論文探討了具有電阻加固比較器及三倍冗餘模組架構的比較器與傳統比較器在脈衝雷射及高能質子等輻射環境下對於單事件效應的表現，並且提出了一個每秒一百萬次取樣的輻射容忍雙通道十二位元連續漸進式類比數位轉換器並使用錯誤偵測及校正。用於輻射實驗的比較器晶片及類比數位轉換器晶片皆透過一百八十奈米CMOS製程實現。 在低頻範圍，傳統單通道連續漸進式類比數位轉換器可達有效位元數十點七四，Walden品質因數為每步階轉換消耗十九點八四飛焦耳，而雙通道連續漸進式類比數位轉換器可達有效位元數九點八，Walden品質因數為每步階轉換消耗四十九點三二飛焦耳。 在正面雷射照射下，傳統比較器及電阻加固比較器皆可觀測到敏感節點位置，而三倍冗餘模組架構的比較器可完全容忍單點雷射照射，傳統連續漸進式類比數位轉換器及雙通道連續漸進式類比數位轉換器則可被判斷出取樣電路為最敏感電路位置。在背面雷射照射下，雙通道連續漸進式類比數位轉換器可容忍達雷射臨界能量零點九奈焦耳並且截面積相比傳統連續漸進式類比數位轉換器小了十倍。在能量為兩百三十萬電子伏特的質子束照射下，雙通道連續漸進式類比數位轉換器的截面積相比傳統連續漸進式類比數位轉換器在相同的輻射條件下小了十倍至一百倍。

In recent years, the rise of LEO (low Earth orbit) satellites has brought increasing attention to the critical challenge of ensuring reliable chip operation in space environments. SEEs (Single-event effects) have been identified as a significant concern for advanced process nodes. At the same time, ADCs (analog-to-digital converters) play a pivotal role in satellite communication and signal processing. The comparator, as the core component of an ADC, requires careful consideration of its radiation performance during design. Additionally, front-end S/H circuits and back-end digital circuits must be equipped with radiation tolerance to ensure the overall stability of the ADC system. This thesis investigates the performance of comparators with resistive hardening and TMR (triple modular redundancy) architectures, compared to conventional comparators, under pulsed laser and high-energy proton irradiation. A 12-bit radiation-tolerant split SAR ADC (successive approximation register) operating at 1 MSPS is proposed, incorporating error detection and correction. At low frequencies, the conventional single-channel SAR ADC achieves an ENOB of 10.74, with a FOMw of 19.84 fJ/conversion step. The radiation-tolerant split SAR ADC achieves an ENOB (effective number of bits) of 9.8, with FOMw (Walden figures of merit) of 49.32 fJ/conversion step. Both the comparator and SAR ADC DUTs were fabricated using the 180nm CMOS process. Under frontside laser irradiation, the sensitive nodes of both conventional and resistive-hardened comparators were identified, while the TMR comparator demonstrated complete immunity to single-point laser strikes. For conventional and radiation-tolerant split SAR ADCs, the S/H circuits were identified as the most sensitive component. Under backside laser irradiation, the radiation-tolerant split SAR ADC tolerated a laser threshold energy of 0.9 nJ, with a cross-section 10 times smaller than that of the conventional SAR ADC. In 230 MeV proton beam energy testing, the cross-section of the radiation-tolerant split SAR ADC was reduced 10 to 100 times compared to the conventional SAR ADC under identical radiation conditions.