氧化層電荷對金氧半穿隧二極體暫態電流行為及光感應特性的影響

Abstract

這篇碩士論文深入探討閘極區域外氧化層電荷對於p型金屬-絕緣層-半導體穿隧二極體電流特性的影響，涵蓋暫態電流及光感應電流。其中，暫態電流是通過在閘極上施加不同的寫入電壓後，再統一施加讀取電壓來測得。根據不同的寫入電壓，元件可讀取到不同的暫態電流，具備雙態記憶體的應用潛力；而光感應電流則探討了元件作為感光元件的潛力。 論文的第一章回顧了先前研究中的特殊結構金氧半穿隧二極體特性及其暫態電流的相關研究。第二章專注於研究閘極外部氧化層電荷對暫態電流的影響，藉由厚氧化層提供不同程度氧化層電荷，並結合實驗結果和TCAD模擬，探討氧化層電荷如何影響暫態電流。研究對比了具厚氧化層的超厚邊緣氧化層(UET) 元件與僅具薄氧化層的平面元件，發現UET元件的暫態電流是平面元件的100倍，顯示氧化層電荷與暫態電流成正相關，而此現象在先前研究中未曾被提及。 論文對於UET元件的穩態電流進行分析，結果顯示當閘極電壓低於平帶電壓時，元件的閘極電流與薄氧化層區域面積成正比；當閘極處於正偏壓時，UET 元件的閘極電流高於平面元件。此外，隨著薄氧化層面積的增大，UET元件的暫態電流也增強，但當薄氧化層與厚氧化層面積接近時，暫態電流趨於飽和。UET元件的暫態電流在從寫入狀態切換至0伏特後的60毫秒內取樣，並且在1000次寫入-讀取循環後，電流變化極小。為了更好理解穩態與暫態電流的機制，論文進行了TCAD模擬，結果顯示閘極外氧化層電荷在暫態行為中扮演了重要角色，這些電荷在閘極電壓切換時可汲取電子。 第三章探討移除閘極外部氧化層電荷後，背對背金氧半穿隧二極體結構(MISIM) 的光感應特性變化。先前研究發現氧化層電荷會增加MISIM電流，降低光感應度，因此，本研究透過移除邊緣氧化層(ER)技術降低氧化層電荷，成功降低MISIM暗電流，接著，進一步透過分壓特性減少暗電流，透過這兩種方式，成功將光感應度提升了300倍。此外，本研究也對ERMISIM元件在不同光強度下的電流與敏感度進行探討，結果顯示光電流與光強度幾乎呈線性變化，展示了ERMISIM元件的感光潛力。此外，ERMISIM元件的光照反應時間約為30毫秒，顯示元件對光的快速反應。 第四章總結了上述研究，展示了氧化層電荷對元件特性的影響，並提出了未來改進的方向及進一步的研究可能性。

This master thesis delves into the influence of oxide charges outside the gate area on the current characteristic of p-type metal-insulator-semiconductor (MIS) tunnel diode (TD), including transient current and photo-induced current. The transient current is measured by applying different write voltages to the gate, followed by an unified read voltage after the writing process. The gate can read different transient currents based on the applied write voltage, enabling the device to function as a two-state memory. The photo-induced current is explored to assess the device's potential as a photosensitive element. In the first chapter, the characteristics of previously studied special-structured MIS TD and some researches on transient currents in such devices were discussed. The second chapter investigates the impact of oxide layer charges outside the gate on transient current. Using ultra-edge-thickened (UET) oxide in MIS TD, which features thick oxide layers with more oxide charges, a considerable amount of oxide charges is supplied from outside the gate. Combining experimental results and TCAD simulations, the study explores how these charges affect the transient current. Additionally, it distinguishes the UET device from planar devices that only have thin oxide layers and lack significant oxide charges outside the gate, serving as control in the experiments. The findings reveal that UET devices exhibit transient currents over 100 times greater than planar devices, demonstrating a positive correlation between the number of oxide charges and the transient current. This mechanism was not addressed in previous research. The steady-state current behavior of the UET devices was also analyzed, particularly focusing on the influence of the thin oxide area under the gate on the gate current. When the gate voltage is less than the flat-band voltage, i.e., in forward bias, the gate current is proportional to the area of the thin oxide, causing planar devices with only thin oxide to exhibit larger gate currents. Conversely, under positive gate bias, where the device is in reverse bias, UET devices show higher gate currents than planar devices. Furthermore, UET devices with larger thin oxide areas display greater transient currents. However, when the thin and thick oxide areas are nearly equal, the enhancement of transient current becomes saturated. The transient currents of UET devices are sampled 60 milliseconds after switching the gate voltage from the write state to 0 V. Endurance characteristics were also measured, showing minimal changes after 1000 write and read cycles. To clarify the mechanism behind the steady-state and transient current behaviors, TCAD simulations were conducted for both scenarios, revealing that the oxide charges outside the gate play a key role in transient behavior. These charges serve as electron reservoirs, drawing electrons when the gate voltage is switched.