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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/96460完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 黎士瑋 | zh_TW |
| dc.contributor.advisor | Shih-Wei Li | en |
| dc.contributor.author | 江立中 | zh_TW |
| dc.contributor.author | Li-Chung Chiang | en |
| dc.date.accessioned | 2025-02-18T16:14:29Z | - |
| dc.date.available | 2026-02-05 | - |
| dc.date.copyright | 2025-02-18 | - |
| dc.date.issued | 2024 | - |
| dc.date.submitted | 2025-02-06 | - |
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| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/96460 | - |
| dc.description.abstract | 為了支援加密的虛擬機器，AMD 提供 Secure Encrypted Virtualization（SEV）功能。在 SEV 中， CPU cache 含有未加密的資料，SEV 藉由在 cache lines 加上標籤來隔離不同 address space identifiers（ASIDs）的實體的 cache 存取。我們逆向了支援 SEV 的 AMD EPYC 處理器，發現存取不同標籤的 cache lines 會觸發 cache flush。另外，我們發現在不同 AISDs 的實體並行執行 memory 存取時會有 memory contention 的行為，無論 cache 是否啟用。我們的發現適用於所有版本的 SEV，包含 SEV，SEV-ES，以及 SEV-SNP。針對 cache flush 以及 memory contention 的行為，我們分別構造出兩種 Reload+Reload（RR）attacks：Reload+Reload-flush-set（RRFS）以及 Reload+Reload-memory-block（RRMB）。為了展現出 hypervisor 使用 RR attacks 攻擊 VMs 的可行性，我們使用 RRFS 作為 Spectre attack 中的隱蔽通道來洩漏出機密資訊，此外，我們使用 RRMB 破解出 AES-128 的密鑰。 | zh_TW |
| dc.description.abstract | AMD provides the Secure Encrypted Virtualization (SEV) extension to support encrypted virtual machines (VMs). In SEV, CPU caches contain unencrypted VM data. SEV tags cache lines to isolate cache accesses from different entities with their unique address space identifiers (ASIDs). In this work, we reverse-engineered AMD EPYC processor with SEV support. We found that access to cache lines with a mismatched tag triggers cache flushing. We also discovered memory contention behaviors when entities with different ASIDs concurrently access the same memory region, independent of cache configuration (enabled/disabled). Our findings apply to all versions of SEV, including SEV, SEV-ES, and SEV-SNP. We formulated two Reload+Reload (RR) attacks based on respectively to the flushing and contention behaviors: Reload+Reload-flush-set (RRFS) and Reload+Reload-memory-block (RRMB). We demonstrated the feasibility of a hypervisor carrying out RR attacks against its hosted VMs. We used RRFS to build a covert channel for a Spectre attack against a SEV VM to leak secret data. Additionally, we used RRMB to extract the AES-128 secret key from a SEV VM. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2025-02-18T16:14:29Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2025-02-18T16:14:29Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | 致謝 iii
摘要 v Abstract vii Contents ix List of Figures xi Chapter 1 Introduction 1 Chapter 2 Background 5 2.1 AMD Secure Encrypted Virtualization 5 2.2 Caches 6 Chapter 3 Reverse-Engineering Cache Flush Effect 7 3.1 Experimental Setup 7 3.2 Cache Flush Experiment 8 3.3 Discussion 11 Chapter 4 Contention-based Memory Side Channel 13 4.1 Single Memory Block Experiment 13 4.2 Multiple Memory Blocks Experiment 16 4.3 Remarks 17 Chapter 5 Attack 19 5.1 Threat Model 19 5.2 Locating SPA of the Target Data 20 5.3 Attack Formulation 21 5.3.1 Reload+Reload-flush-set (RRFS) Attack 21 5.3.2 Reload+Reload-memory-block (RRMB) Attack 22 Chapter 6 Case Studies 25 6.1 AES Attack 25 6.1.1 Attack Overview 25 6.1.2 Employing RRMB 27 6.1.3 Evaluation 30 6.2 Spectre Attack 31 6.2.1 Employing RRFS 31 6.2.2 Evaluation 32 Chapter 7 Discussion 33 7.1 Covert Channel Performance 33 7.2 Noise Resilience 35 Chapter 8 Related Work 37 Chapter 9 Countermeasures 39 Chapter 10 Conclusion 41 Reference 43 | - |
| dc.language.iso | en | - |
| dc.subject | 快取 | zh_TW |
| dc.subject | 記憶體競爭 | zh_TW |
| dc.subject | 旁通道攻擊 | zh_TW |
| dc.subject | 逆向工程 | zh_TW |
| dc.subject | AMD SEV | zh_TW |
| dc.subject | Memory Contention | en |
| dc.subject | AMD SEV | en |
| dc.subject | Reverse-Engineering | en |
| dc.subject | Side-channel Attacks | en |
| dc.subject | Cache | en |
| dc.title | Reload+Reload：利用 AMD SEV 上的快取及記憶體旁通道 | zh_TW |
| dc.title | Reload+Reload: Exploiting Cache and Memory Contention Side Channel on AMD SEV | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 113-1 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 陳君朋;吳家麟;雷欽龍;黃俊穎 | zh_TW |
| dc.contributor.oralexamcommittee | Jiun-Peng Chen;Ja-Ling Wu;Chin-Laung Lei;Chun-Ying Huang | en |
| dc.subject.keyword | AMD SEV,逆向工程,旁通道攻擊,快取,記憶體競爭, | zh_TW |
| dc.subject.keyword | AMD SEV,Reverse-Engineering,Side-channel Attacks,Cache,Memory Contention, | en |
| dc.relation.page | 50 | - |
| dc.identifier.doi | 10.6342/NTU202500283 | - |
| dc.rights.note | 同意授權(限校園內公開) | - |
| dc.date.accepted | 2025-02-06 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 資訊工程學系 | - |
| dc.date.embargo-lift | 2026-02-05 | - |
| 顯示於系所單位： | 資訊工程學系 | |
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