Skip navigation

DSpace

機構典藏 DSpace 系統致力於保存各式數位資料(如:文字、圖片、PDF)並使其易於取用。

點此認識 DSpace
DSpace logo
English
中文
  • 瀏覽論文
    • 校院系所
    • 出版年
    • 作者
    • 標題
    • 關鍵字
    • 指導教授
  • 搜尋 TDR
  • 授權 Q&A
    • 我的頁面
    • 接受 E-mail 通知
    • 編輯個人資料
  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 光電工程學研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/95352
完整後設資料紀錄
DC 欄位值語言
dc.contributor.advisor黃建璋zh_TW
dc.contributor.advisorJian-Jang Huangen
dc.contributor.author蔡旻珊zh_TW
dc.contributor.authorMin-Shan Tsaien
dc.date.accessioned2024-09-05T16:18:52Z-
dc.date.available2024-09-06-
dc.date.copyright2024-09-05-
dc.date.issued2024-
dc.date.submitted2024-08-12-
dc.identifier.citationBerger, O. GaAs HBT for power applications [power amplifier applications]. in Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting. 2004.
Esame, O., et al., Performance comparison of state-of-the-art heterojunction bipolar devices (HBT) based on AlGaAs/GaAs, Si/SiGe and InGaAs/InP. Microelectronics Journal, 2004. 35(11): p. 901-908.
Streit, D.C., et al. InP HBT technology and applications. in Conference Proceedings. 1998 International Conference on Indium Phosphide and Related Materials (Cat. No.98CH36129). 1998.
Oki, A.K., et al. InP HBT and HEMT technology and applications. in Conference Proceedings. 2000 International Conference on Indium Phosphide and Related Materials (Cat. No.00CH37107). 2000.
DeMange, S. and B. Wu, InP HBT Technology: Advantages, Applications and Future Challenges. Microwave Journal, 2023. 66(6).
Ajayan, J. and D. Nirmal, A review of InP/InAlAs/InGaAs based transistors for high frequency applications. Superlattices and Microstructures, 2015. 86: p. 1-19.
Chen, C.-Y., et al., Comparative studies of InP/InGaAs single and double heterojunction bipolar transistors with a tunnelling emitter barrier structure. Semiconductor science and technology, 2004. 19(7): p. 864.
Bolognesi, C.R. and O.J. Ostinelli, Г-L intervalley separation and electron mobility in GaAsSb grown on InP: Transport comparison with the GaInAs and GaInAsSb alloys. Applied Physics Letters, 2021. 119(24).
Lai, R., et al. Sub 50 nm InP HEMT Device with Fmax Greater than 1 THz. in 2007 IEEE International Electron Devices Meeting. 2007.
Urteaga, M., et al. 130nm InP DHBTs with ft >0.52THz and fmax >1.1THz. in 69th Device Research Conference. 2011.
Urteaga, M., et al., InP HBT Technologies for THz Integrated Circuits. Proceedings of the IEEE, 2017. 105(6): p. 1051-1067.
Liu, Y., et al., Experimental performance comparison of 0.72 eV-GaSb and 0.59 eV-InGaAs thermophotovoltaic cells under different radiation temperatures. Applied Energy, 2024. 361: p. 122959.
Snodgrass, W., et al., Graded base type-II InP/GaAsSb DHBT with fT=475 GHz. IEEE Electron Device Letters, 2006. 27(2): p. 84-86.
Urteaga, M., et al. InP HBT Technologies for sub-THz Communications. in 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). 2022.
Streit, D., et al. InP HEMT and HBT applications beyond 200 GHz. in Conference Proceedings. 14th Indium Phosphide and Related Materials Conference (Cat. No.02CH37307). 2002.
Kobayashi, K.W., A.K. Oki, and D.C. Streit, Indium phosphide heterojunction bipolar transistor technology for future telecommunications applications. Microwave Journal, 1999. 42(7): p. 74-75.
InP-Indiun Phosphide.
GaxIn1-xAs.
Ishibashi, T., Influence of electron velocity overshoot on collector transit times of HBTs. IEEE Transactions on Electron Devices, 1990. 37(9): p. 2103-2105.
Ashburn, P., SiGe heterojunction bipolar transistors. 2004: John Wiley & Sons.
Radha Setty, T.A., Mini-Circuits Understanding Heterojunction Bipolar Transistors (HBTs). Dec 8, 2021.
Fonstad, C.G. and D.o.E.E.a.C.S.M.I.o. Technology, MICROELECTRONIC DEVICES AND CIRCUITS 2006.
Ferro, Y.C.C.a.R. V. Heterojunction Bipolar Transistors.
Yuan, J.S. and J.J. Liou, Heterojunction Bipolar Transistors, in Semiconductor Device Physics and Simulation, J.S. Yuan and J.J. Liou, Editors. 1998, Springer US: Boston, MA. p. 255-294.
LAB, I., Research. 2023.
Hu_ch08v3.fm, Bipolar Transistor. 2009.
Arar, D.S. Understanding the Amplifier Offset Voltage and Output Swing in Resistive Current Sensing. August 22, 2021.
Lim, K.-T., S.-J. Kim, and O.-K. Kwon. The OP-amplifier with offset cancellation circuit. in 2003 IEEE Conference on Electron Devices and Solid-State Circuits (IEEE Cat. No. 03TH8668). 2003. IEEE.
Li, R.P.a.K., DC Parameters: Input Offset Voltage (VOS). OCTOBER 2022.
Berger, H., Models for contacts to planar devices. Solid-state electronics, 1972. 15(2): p. 145-158.
Xu, Y., et al., Modified transmission-line method for contact resistance extraction in organic field-effect transistors. Applied Physics Letters, 2010. 97(6).
Pavlidis, D., Reliability characteristics of GaAs and InP-based heterojunction bipolar transistors. Microelectronics Reliability, 1999. 39(12): p. 1801-1808.
Driad, R., et al., Passivation of InP-based HBTs. Solid-State Electronics, 1999. 43(8): p. 1445-1450.
Hiraoka, Y.S., J. Yoshida, and M. Azuma, Two-dimensional analysis of emitter-size effect on current gain for GaAlAs/GaAs HBT's. IEEE transactions on electron devices, 1987. 34(4): p. 721-725.
Hayama, N. and K. Honjo, Emitter size effect on current gain in fully self-aligned AlGaAs/GaAs HBT's with AlGaAs surface passivation layer. IEEE Electron Device Letters, 1990. 11(9): p. 388-390.
Abid, Z., et al., Temperature dependent DC characteristics of an InP/InGaAs/InGaAsP HBT. IEEE electron device letters, 1994. 15(5): p. 178-180.
Kim, S.-I., et al., Temperature dependent electrical properties of heavily carbon-doped GaAs grown by low-pressure metalorganic chemical vapor deposition. Solid state communications, 1995. 93(11): p. 939-942.
Wang, H., et al., Temperature dependence of avalanche multiplication in InP-based HBTs with InGaAs/InP composite collector: device characterization and physics model. IEEE Transactions on Electron Devices, 2003. 50(12): p. 2335-2343.
Liu, W.-C., et al., Temperature-dependent study of a lattice-matched InP/InGaAlAs heterojunction bipolar transistor. IEEE Electron Device Letters, 2000. 21(11): p. 524-527.
Bovolon, N., et al., Theoretical and experimental investigation of the collector-emitter offset voltage of AlGaAs/GaAs heterojunction bipolar transistors. IEEE Transactions on Electron Devices, 1999. 46(4): p. 622-627.
Cheng, L., et al., A compact macromodeling method for characterizing large-signal DC and AC performance of InP and GaAs HBTs. Journal of Semiconductor Technology and Science, 2022. 22(2): p. 84-92.
Samelis, A., et al., Large-signal characteristics of InP-based heterojunction bipolar transistors and optoelectronic cascode transimpedance amplifiers. IEEE Transactions on Electron Devices, 1996. 43(12): p. 2053-2061.
-
dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/95352-
dc.description.abstract隨著通訊技術的發展,對5G毫米波放大器的需求不斷增加,並展望未來6G太赫茲應用,磷化銦(InP)被視為極具潛力的半導體材料。磷化銦具備高熱導率、高電子遷移率及低能隙,使用磷化銦與砷化鎵銦(InGaAs)或銻砷化鎵(GaAsSb)製成的異質接面雙極性電晶體(HBT)具有較低的表面複合速度,可縮小尺寸並降低耗電量。將磷化銦異質接面雙極性電晶體應用於低地軌道衛星也具備巨大前景,其高頻性能適用於從GHz至太赫茲波段的衛星通信,並且其高功率輸出增強了傳輸功率和信號覆蓋。磷化銦異質接面雙極性電晶體還具有優異的熱導率、熱穩定性和抗輻射能力,可在低地軌道衛星中保持穩定的性能。
本研究對InP/ GaAsSb/ InP雙異質接面雙極性電晶體(DHBT)進行了多項直流特性分析。首先,我們使用濕蝕刻方法製造異質接面雙極性電晶體的射極、基極和集極高台部分。濕蝕刻可以有效減少蝕刻過程中產生的副產物。在射極部分,我們設計了三種尺寸,分別為50×50、60×60、70×70μm²,以探討射極尺寸對直流特性的影響。結果顯示,射極尺寸較小的元件具有較大的電流增益和較小的偏移電壓。隨後,我們在元件上生長了一層SiN作為鈍化層,並比較鈍化前後的特性差異,發現鈍化後,元件的漏電流增加,電流增益降低,偏移電壓變大。
當將磷化銦異質接面雙極性電晶體應用於衛星通信時,必須考慮其在低溫下的性能特性,因為低軌域衛星的環境溫度會低至¬-100度C以下。本研究利用低溫系統並加入氮氣,測量磷化銦異質接面雙極性電晶體在300K至77K範圍內的直流特性,結果顯示,當元件處於77K的低溫環境時,仍能保持電晶體的特性,且溫度越低,電流增益越大、漏電流越小,然而,低溫下的缺點是偏移電壓較大。
本研究利用ADS(Advanced Design System)建立模型,建立射極尺寸為50×50μm²在溫度為300K時的模型。我們將比較量測結果與模型生成的直流特性,最終求出一個包含溫度變數的跨導(transconductance)以及漏電流的公式,此公式能描述本研究製作的磷化銦異質接面雙極性電晶體的特性。
zh_TW
dc.description.abstractWith the advancement of communication technology, the demand for 5G millimeter-wave amplifiers continues to grow, and future applications in 6G terahertz technology are anticipated. Indium Phosphide (InP) is regarded as a highly promising semiconductor material. InP possesses high thermal conductivity, high electron mobility, and a low bandgap, making it suitable for low-voltage operations. Heterojunction Bipolar Transistors (HBTs) made from InP and Indium Gallium Arsenide (InGaAs) or Gallium Arsenide Antimonide (GaAsSb) have lower surface recombination velocities, allowing for smaller device sizes and reduced power consumption. Applying InP HBTs to Low Earth Orbit (LEO) satellites also holds significant potential. Their high-frequency performance, suitable for GHz to terahertz band satellite communications, along with high power output, enhances transmission power and signal coverage. Additionally, InP HBTs offer excellent thermal conductivity, thermal stability, and radiation resistance, ensuring stable performance in LEO satellite environments.
This study analyzes the DC characteristics of InP/ GaAsSb/ InP Double Heterojunction Bipolar Transistors (DHBTs). First, we fabricated the emitter, base, and collector mesas of the HBTs using a wet etching method. Wet etching effectively reduces by-products generated during the etching process. For the emitter, we designed three sizes: 50×50, 60×60, and 70×70 μm², to investigate the impact of emitter size on DC characteristics. The results show that devices with smaller emitter sizes exhibit higher current gain and lower offset voltage. Subsequently, a layer of SiN was grown on the devices as a passivation layer, and the characteristics before and after passivation were compared. It was found that after passivation, the leakage current increased, the current gain decreased, and the offset voltage became larger.
When applying InP HBTs to satellite communications, it is essential to consider their performance characteristics at low temperatures, as the environmental temperature in low Earth orbit satellites can drop below -100°C. This study utilized a low-temperature system with nitrogen gas to measure the DC characteristics of InP HBTs within the 300K to 77K range. The results show that at 77K, the devices retain their transistor characteristics, and as the temperature decreases, the current gain increases while the leakage current decreases. However, a drawback at low temperatures is the larger offset voltage.
In this study, we used ADS (Advanced Design System) to build a model for an emitter size of 50×50μm² at a temperature of 300K. We will compare the measured results with the DC characteristics generated by the model. Ultimately, we aim to derive a formula for transconductance and leakage current that includes temperature variables, describing the characteristics of the indium phosphide heterojunction bipolar transistor fabricated in this study.
en
dc.description.provenanceSubmitted by admin ntu (admin@lib.ntu.edu.tw) on 2024-09-05T16:18:52Z
No. of bitstreams: 0
en
dc.description.provenanceMade available in DSpace on 2024-09-05T16:18:52Z (GMT). No. of bitstreams: 0en
dc.description.tableofcontents致謝 ii
中文摘要 iii
英文摘要 v
CONTENTS viii
LIST OF FIGURES xi
LIST OF TABLES xv
Chapter 1 Introduction 1
1.1 Background and Overview 1
1.2 Motivation and Purpose 4
1.3 Thesis Outline 6
Chapter 2 Theory and Literature Review 8
2.1 Material Properties 8
2.2 Transistor Structure 10
2.3 Operating Principle 12
2.4 Type I and Type II InP HBT 15
2.5 DC Characteristics 18
2.5.1 Current Gain 18
2.5.2 Transconductance 18
2.5.3 Output Conductance 19
2.5.4 Input Offset Voltage 19
Chapter 3 Device Fabrication 21
3.1 Design of Epi Structure 21
3.2 Design of HBT Layout and Structure 23
3.3 Process Flow of Device Fabrication 25
3.3.1 Emitter Mesa 25
3.3.2 Base Mesa 26
3.3.3 Collector Mesa 27
3.3.4 Contact Metal 28
3.3.5 SiN Passivation 30
Chapter 4 DC Measurement 33
4.1 At Room Temperature 33
4.1.1 Without Passivation 33
4.1.2 With Passivation 36
4.1.3 Comparison of With Passivation and Without Passivation 38
4.2 At Low Temperature 42
Chapter 5 Large Signal Model of HBT 48
5.1 Preface 48
5.2 Model of HBT at Room Temperature (300K) 49
5.3 Relationship Between Parameters and Temperature 52
5.3.1 Relationship Between gm and Temperature 52
5.3.2 Relationship Between Ir and Temperature 54
Chapter 6 Conclusion 57
Reference 59
-
dc.language.isoen-
dc.subject嘉莫圖zh_TW
dc.subjectADS建模zh_TW
dc.subject低溫量測zh_TW
dc.subject輸出特性曲線zh_TW
dc.subject磷化銦zh_TW
dc.subject雙異質接面雙極性電晶體zh_TW
dc.subject二極體曲線zh_TW
dc.subjectGummel ploten
dc.subjectdiode curveen
dc.subjectHeterojunction Bipolar Transistors (HBTs)en
dc.subjectIndium Phosphide (InP)en
dc.subjectlarge signal modelingen
dc.subjectlow-temperature measurementen
dc.subjectoutput characteristic curveen
dc.title在低溫下磷化銦異質接面雙極性電晶體之直流特性分析zh_TW
dc.titleDC Analysis of Indium Phosphide Heterojunction Bipolar Transistors at Low Temperatureen
dc.typeThesis-
dc.date.schoolyear112-2-
dc.description.degree碩士-
dc.contributor.oralexamcommittee吳育任;林坤佑;吳肇欣zh_TW
dc.contributor.oralexamcommitteeYuh-Renn Wu;Kun-You Lin;Chao-Hsin Wuen
dc.subject.keyword磷化銦,雙異質接面雙極性電晶體,二極體曲線,嘉莫圖,輸出特性曲線,低溫量測,ADS建模,zh_TW
dc.subject.keywordIndium Phosphide (InP),Heterojunction Bipolar Transistors (HBTs),diode curve,Gummel plot,output characteristic curve,low-temperature measurement,large signal modeling,en
dc.relation.page63-
dc.identifier.doi10.6342/NTU202404093-
dc.rights.note同意授權(全球公開)-
dc.date.accepted2024-08-13-
dc.contributor.author-college電機資訊學院-
dc.contributor.author-dept光電工程學研究所-
顯示於系所單位:光電工程學研究所

文件中的檔案:
檔案 大小格式 
ntu-112-2.pdf2.56 MBAdobe PDF檢視/開啟
顯示文件簡單紀錄


系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。

社群連結
聯絡資訊
10617臺北市大安區羅斯福路四段1號
No.1 Sec.4, Roosevelt Rd., Taipei, Taiwan, R.O.C. 106
Tel: (02)33662353
Email: ntuetds@ntu.edu.tw
意見箱
相關連結
館藏目錄
國內圖書館整合查詢 MetaCat
臺大學術典藏 NTU Scholars
臺大圖書館數位典藏館
本站聲明
© NTU Library All Rights Reserved