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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電信工程學研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/93860
標題: 基於裝載二極體之一位元可重構式寬頻穿透陣列單元及其直流偏壓走線設計
Wideband 1-Bit Reconfigurable Transmitarray Unit Cell Based on PIN Diode Loading and Its DC Bias Routing Design
作者: 林柏廷
Bo-Ting Lin
指導教授: 陳士元
Shih-Yuan Chen
關鍵字: 波束掃描,直流偏壓走線設計,二極體,可重構式,穿透陣列天線,
beam-steering,DC bias routing design,PIN diodes,reconfigurable,transmitarrays,
出版年 : 2023
學位: 碩士
摘要: 在即將到來的 B5G/6G 無線通訊中,穿透陣列天線可用於波束控制應用。本論文中,我們提出了一種寬頻、裝載二極體之穿透陣列天線單元,可應用於在穿透陣列天線上的每個位置生成一位元可切換的穿透相位補償。我們添加了多種結構來改善二極體的負載影響。其3-dB插入損失頻寬為23.8%,頻寬內最小的插入損失為0.798 dB。為了驗證模擬結果的正確性,我們採用波導量測技術對此穿透陣列天線單元進行量測,其結果與模擬一致。
此外,可重構式穿透陣列天線須有合適的直流偏壓走線設計來為每一個穿透陣列天線單元提供獨立且特定的直流偏壓。然而,直流偏壓走線將無可避免地覆蓋整個穿透陣列,進而影響其穿透性能。另一方面,一般穿透陣列天線的單元數量往往相當龐大,若使用離散元件隔離單元內的直流及射頻訊號,則所需之元件數將十分可觀,且會提高製作的困難度。在不使用其他離散元件進行直流及射頻訊號隔離之條件下,為了減少直流偏壓走線的影響,本論文針對穿透陣列天線的直流偏壓走線設計進行討論。首先,透過文獻回顧,我們總結了前人的論文並歸納出直流偏壓走線的規則。接著,吾人提出四種直流偏壓走線的設計。其中,前兩種設計乃基於基本走線規則,而後兩種設計則是基於進階走線規則。此外,為了評估不同的直流偏壓走線設計的影響,我們亦提出兩種模擬方式。
最後,為了驗證吾人所提出的穿透陣列天線單元及直流偏壓走線設計,我們實作出操作於X頻段的64單元可重構式穿透陣列天線,並在微波暗室中進行量測。然受限於製作成本,該一位元可重構式穿透陣列天線原型僅有64單元,故在11.5GHz的增益為9.1 dBi,3-dB增益頻寬為25%。所測得的波束掃描範圍及對應之損耗為40度(2.3 dB) x 40度(3.3 dB)。此結果驗證了所提出的一位元可重構式穿透陣列天線單元及直流偏壓走線的可行性。
In the emerging B5G/6G wireless communications, transmitarrays are promising candidates for beam-steering applications. In this work, a wideband PIN-diode-loaded transmitarray unit cell is proposed to generate 1-bit phase compensation at each location on the transmitarray. Several modifications are added to mitigate the loading effect of the PIN diodes. The 3-dB insertion loss bandwidth is 23.8%, and the minimum insertion loss is 0.798 dB. For verification, the waveguide measurement technique is adopted to characterize the proposed 1-bit reconfigurable unit cell. The measured results are consistent with those simulated.
Besides, for a reconfigurable transmitarray, proper DC bias routing design is critical to provide each unit cell with the desired DC bias voltages while not affecting its RF performance. However, the DC bias routing will inevitably cover the transmitarray surface and thus degrade the transmission performance of the transmitarray. On the other hand, the number of unit cells of a transmitarray antenna is in general relatively large. If discrete components are used to isolate the DC and RF signals in each unit cell, then an excessive number of components will be needed, increasing significantly the fabrication cost and complexity. Therefore, under the constraint of not using discrete components for DC and RF isolation, design considerations for reducing the impact imposed by DC bias routing in a reconfigurable transmitarray formed by the proposed unit cell is presented. Through the literature survey, some routing guidelines are derived from the previous works. Then, four designs of DC bias routing are proposed. Two of them are based on general routing rules, whereas the other two are based on advanced routing rules. Also, two simulation methods are introduced to evaluate the influence of different DC bias routing designs.
Lastly, to further verify the efficacy of the proposed unit cell and DC bias routing design, an 8x8 1-bit reconfigurable transmitarray based on the proposed unit cell and DC bias routing design is fabricated and tested in the anechoic chamber. Limited by the fabrication cost, such an 88 reconfigurable transmitarray shows only a broadside gain of 9.1 dBi at 11.5 GHz and a 3-dB gain bandwidth of 25%. The achieved beam scanning range and loss for the two principal cut planes are 40 degree (2.3 dB) x 40 degree (3.3 dB). The feasibility of the proposed 1-bit reconfigurable transmitarray unit cell and its DC routing design is verified.
URI: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/93860
DOI: 10.6342/NTU202302000
全文授權: 同意授權(全球公開)
顯示於系所單位:電信工程學研究所

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