請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/93076完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 陳景然 | zh_TW |
| dc.contributor.advisor | Ching-Jan Chen | en |
| dc.contributor.author | 陳曉萱 | zh_TW |
| dc.contributor.author | Hsiao-Hsuan Chen | en |
| dc.date.accessioned | 2024-07-17T16:17:26Z | - |
| dc.date.available | 2024-07-18 | - |
| dc.date.copyright | 2024-07-17 | - |
| dc.date.issued | 2024 | - |
| dc.date.submitted | 2024-07-12 | - |
| dc.identifier.citation | [1] M. S. Ahmed and A. A. Fayed, "A Current-Mode Delay-Based Hysteretic Buck Regulator With Enhanced Efficiency at Ultra-Light Loads for Low-Power Microcontrollers," IEEE Trans. Power Electron, vol. 35, no. 1, pp. 471-483, Jan. 2020.
[2] A. Besharati Rad, M. Kargaran, M. Meghdadi and A. Medi, "A Wide-Input-/Output-Voltage-Range Buck Converter With Adaptive Light-Load Efficiency Improvement and Seamless Mode Transition," IEEE Trans. Power Electron., vol. 39, no. 2, pp. 2200-2212, Feb. 2024. [3] W. Hong and M. Lee, "A 7.4-MHz Tri-Mode DC-DC Buck Converter With Load Current Prediction Scheme and Seamless Mode Transition for IoT Applications," IEEE Trans. Circuits Syst. I: Reg. Papers, vol. 67, no. 12, pp. 4544-4555, Dec. 2020. [4] J. Kang, J. Park, M. Jeong and C. Yoo, "A Time-domain-controlled Current-mode Buck Converter With Wide Output Voltage Range," IEEE J. Solid-State Circuits, vol. 54, no. 3, pp. 865-873, March 2019. [5] D. -H. Jung, K. Kim, S. Joo and S. -O. Jung, "0.293-mm2 Fast Transient Response Hysteretic Quasi- V2 DC–DC Converter With Area-Efficient Time-Domain-Based Controller in 0.35- μ m CMOS," IEEE J. Solid-State Circuits, vol. 53, no. 6, pp. 1844-1855, June 2018. [6] C. -Y. Ting, J. -Y. Lin and C. C. -P. Chen, "A Quasi-V2 Hysteretic Buck Converter With Adaptive COT Control for Fast DVS and Load-Transient Response in RF Applications," IEEE Trans. Circuits Syst. II: Exp. Briefs, vol. 67, no. 3, pp. 531-535, March 2020. [7] F. Su, W. -H. Ki and C. -Y. Tsui, "Ultra Fast Fixed-Frequency Hysteretic Buck Converter With Maximum Charging Current Control and Adaptive Delay Compensation for DVS Applications," IEEE J. Solid-State Circuits, vol. 43, no. 4, pp. 815-822, April 200. [8] L. Cheng, Y. Liu and W. -H. Ki, "A 10/30 MHz Fast Reference-Tracking Buck Converter With DDA-Based Type-III Compensator," IEEE J. Solid-State Circuits, vol. 49, no. 12, pp. 2788-2799, Dec. 2014. [9] X. Liu, C. Huang and P. K. T. Mok, "A 50MHz 5V 3W 90% efficiency 3-level Buck Converter With Real-time Calibration and Wide Output Range for Fast-DVS in 65nm CMOS," IEEE Symp. VLSI Circuits, Honolulu, HI, USA, 2016, pp. 1-2. [10] W. Huang, L. Liu, X. Liao, C. Xu and Y. Li, "A 240-nA Quiescent Current, 95.8% Efficiency AOT-Controlled Buck Converter With A2-Comparator and Sleep-Time Detector for IoT Application," IEEE Trans. Power Electron., vol. 36, no. 11, pp. 12898-12909, Nov. 2021. [11] H. -H. Chen, C. -J. Tsai and C. -J. Chen, "A Monolithic 30uA – 1.5A > 85%-Efficiency, Passive-Ramp-Extended-Ton Controlled Buck Converter For Mobile SoC Fast DVS," IEEE Appl. Power Electron. Conf. Expo. (APEC), Orlando, FL, USA, 2023, pp. 1211-1216. [12] J. Li and F. C. Lee, "Modeling of V2 Current-Mode Control," IEEE Appl. Power Electron. Conf. Expo., Washington, DC, USA, 2009, pp. 298-304 [13] W. -C. Chen et al., "Pseudo-Constant Switching Frequency in On-Time Controlled Buck Converter With Predicting Correction Techniques," IEEE Tran. Power Electron., vol. 31, no. 5, pp. 3650-3662, May 2016. [14] P. -H. Liu, F. C. Lee and Q. Li, "Hybrid Interleaving With Adaptive PLL Loop for Adaptive On-time Controlled Switching Converters," Proc. IEEE Energy Convers. Congr. Expo., Pittsburgh, PA, USA, 2014. [15] V. Li, Q. Li, F. C. Lee and P. -H. Liu, "State-Trajectory Control With Single-Cycle Response for Point-of-Load Converters," IEEE Trans. Ind. Electron., vol. 67, no. 4, pp. 3157-3166, April 2020. [16] Y.-R. Huang, C.-J. Chen, J.-C. Wu and T.-W. Huang, “A Fast-Transient Boost Converter With Peak Passive Ripple Mode Control and AC Couple,” IEEE Trans. Power Electron., vol. 38, no. 10, pp. 12975-12987, Oct. 2023 [17] Y.-R. Huang, C.-J. Chen, “A Novel Describing Function Small-Signal Modeling Approach for Passive Ripple Constant On-Time Controlled Converter With Exponentially Varying Slope,” IEEE Trans. Power Electron., Early access. [18] S. J. Kim, W. -S. Choi, R. Pilawa-Podgurski and P. K. Hanumolu, "A 10-MHz 2–800-mA 0.5–1.5-V 90% Peak Efficiency Time-Based Buck Converter With Seamless Transition Between PWM/PFM Modes," IEEE J. Solid-State Circuits, vol. 53, no. 3, pp. 814-824, March 2018. [19] R. D. Middlebrook, "Methods of Design-Oriented Analysis: The Quadratic Equation Revisited," Proceedings. Twenty-Second Annual Conference Frontiers in Education, Nashville, TN, USA, 1992. [20] I-C. Wei, D. Chen, Y.-C. Lin and C.-J. Chen, "The Stability Modeling of Ripple-based Constant On-time Control Schemes Used in The Converters Operating in DCM," Int. Conf. Renewable Energy Research and Appl. (ICRERA), Nagasaki, 2012, pp. 1-8. [21] B. Razavi and B. A. Wooley, "Design Techniques for High-Speed, High-resolution Comparators," IEEE J. Solid-State Circuits, vol. 27, no. 12, pp. 1916-1926, Dec. 1992. [22] R. B. Ridley, "A new, continuous-time model for current-mode control (power convertors)," IEEE Transactions on Power Electronics, vol. 6, no. 2, pp. 271-280, April 1991. [23] A. Wild and V. Gheorghiu, "Theory of operation and design criteria for a MOS peaking current source," CAS '99 Proceedings. 1999 International Semiconductor Conference (Cat. No.99TH8389), Sinaia, Romania, 1999, pp. 85-88 vol.1 [24] C. Chang, "Combined lossless current sensing for current mode control," Proc. Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, 2004. APEC '04., Anaheim, CA, USA, 2004, pp. 404-410 Vol.1. [25] Y. -C. Lin, C. -J. Chen, D. Chen and B. Wang, "A Ripple-Based Constant On-Time Control With Virtual Inductor Current and Offset Cancellation for DC Power Converters," IEEE Trans. Power Electron., vol. 27, no. 10, pp. 4301-4310, Oct. 2012. | - |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/93076 | - |
| dc.description.abstract | 隨著行動裝置的普及,針對系統晶片的高效能電源管理積體電路需求日益增長。雖然以往研究已針對寬負載範圍內保持高效率、實現快速負載暫態響應及快速動態電壓調節等問題分別提出了解決方案,但至今尚無研究能夠同時解決這些問題。
本論文提出了被動式斜坡延長導通時間控制的降壓型轉換器,其適用於行動裝置,並同時具備三項特點:在寬負載範圍皆能維持高效率、具備快速暫態響應和動態電壓調節。另外,透過小信號分析得到頻寬內零極點的特性,也就是使用誤差放大器和單一原點補償電容便能夠進行調節,從而使得誤差放大器的靜態電流可隨其補償電容同時往下調整,以增加輕載效率。 除此之外,本論文提出了鉗位機制解決了誤差放大器輸出電壓飽和的問題,並搭配延長導通時間使抽載的輸出欠壓減少了四倍。此外,本論文提出了一動態偏置的誤差放大器,以加速動態電壓調節,使動態電壓調節響應速度比使用傳統誤差放大器快三倍。並因為控制的特性,實現了從連續導通模式到不連續導通模式的無縫過渡。 本論文之晶片採用TSMC 0.18 µm CMOS製程,在連續導通模式下切頻為4 MHz,靜態電流僅2 µA,在40 µA到1.2 A的30000倍負載電流範圍內均達到大於85%的效率。另外,在暫態響應中,當負載為1 A / 100 ns的電流步階時,其恢復時間為1.96 µs,並且輸出欠壓為80 mV。至於動態電壓調節的表現,輸出電壓從1.25 V上升到1.8 V的穩定時間為2.8 µs,而在連續導通模式與不連續導通模式切換之間,輸出電壓的擾動小於24 mV。 | zh_TW |
| dc.description.abstract | With the widespread use of mobile devices, the demand for high-performance power management integrated circuits (PMICs) for system-on-chips (SoCs) is increasing. While prior research has individually tackled challenges such as maintaining high efficiency across a wide load range, achieving fast load transient response, and enabling quick dynamic voltage scaling (DVS), a comprehensive solution addressing all these issues simultaneously has not been achieved in previous studies。
This thesis proposes a passive ramp extended-on-time (PR-ETON) controlled buck converter suitable for mobile devices, featuring three main characteristics simultaneously: high efficiency over a wide load range, fast transient response, and fast DVS. Through small signal analysis, zero pole in-band characteristic is obtained, allowing the use of type-I compensation, which involves only an integrator error amplifier (EA) and a single compensation capacitor, allowing the quiescent current of EA to be scalable with its compensation capacitor to enhance light load efficiency. Additionally, a clamping mechanism is proposed to address the issue of the EA's output voltage saturation. When combined with the extended-on-time control, this mechanism reduces load transient output undershoot by four times. Furthermore, an adaptive biased EA is proposed to accelerate DVS response, making the DVS response three times faster than using conventional error amplifiers. The control characteristics also enable seamless transition between continuous conduction mode (CCM) and discontinuous conduction mode (DCM). The chip, fabricated using TSMC's 0.18 µm CMOS process, operates at a switching frequency of 4 MHz in CCM and has a quiescent current of only 2 µA. It achieves greater than 85% efficiency across a 30,000 times load current range from 40 µA to 1.2 A. In the load transient response, the recovery time is 1.96 µs with a 1 A / 100 ns load current step, and the output voltage undershoot is 80 mV. For DVS performance, the output voltage stabilizes in 2.8 µs when rising from 1.25 V to 1.8 V. Moreover, during the transition between CCM and DCM, the output voltage perturbation is less than 24 mV. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2024-07-17T16:17:26Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2024-07-17T16:17:26Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | 誌謝 I
中文摘要 II Abstract III Table of Contents V List of Figures VII List of Tables XI Chapter 1 Introduction 1 1.1 Background 1 1.2 Prior Works 1 1.3 Review of the Conventional V2 Constant On-Time Control 3 1.4 Chip Design Goal 5 1.5 Thesis Outline 8 Chapter 2 Proposed Control Method and Overall Circuit 9 2.1 Circuit Architecture 9 2.2 Time Domain Operation 12 2.3 Techniques for Accelerating Transient Response 17 2.4 Seamless Transition Between CCM and DCM 21 2.5 Frequency Domain Analysis 23 Chapter 3 Circuit Implementation 37 3.1 Adaptive Biased EA 37 3.2 Main Comparator and Fast Wake-up Bias 45 3.3 Bandgap Reference 50 3.4 Adaptive On-Time Generator and Sleep timer 55 3.5 Auto Calibration Zero Current Detector 60 Chapter 4 Measurements Results 67 4.1 Chip Overview 67 4.2 PCB Design and Experimental Platform 71 4.3 Experimental Result 74 Chapter 5 Conclusions and Future works 87 5.1 Conclusions 87 5.2 Future Works 88 Reference 90 | - |
| dc.language.iso | en | - |
| dc.subject | 降壓型轉換器 | zh_TW |
| dc.subject | 電源管理積體電路 | zh_TW |
| dc.subject | 被動斜坡控制 | zh_TW |
| dc.subject | 快速動態電壓調節 | zh_TW |
| dc.subject | 快速負載暫態響應 | zh_TW |
| dc.subject | passive ramp control | en |
| dc.subject | buck converter | en |
| dc.subject | power management integrated circuit (PMIC) | en |
| dc.subject | fast transient | en |
| dc.subject | fast DVS | en |
| dc.title | 具低靜態電流與快速暫態響應之被動式斜坡延長導通時間控制降壓型轉換器 | zh_TW |
| dc.title | A Passive Ramp Extended-On-Time Controlled Buck Converter with Low Quiescent Current and Fast Transient Response | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 112-2 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 陳耀銘;陳信樹 | zh_TW |
| dc.contributor.oralexamcommittee | Yaow-Ming Chen;Hsin-Shu Chen | en |
| dc.subject.keyword | 降壓型轉換器,電源管理積體電路,被動斜坡控制,快速動態電壓調節,快速負載暫態響應, | zh_TW |
| dc.subject.keyword | buck converter,power management integrated circuit (PMIC),passive ramp control,fast DVS,fast transient, | en |
| dc.relation.page | 93 | - |
| dc.identifier.doi | 10.6342/NTU202401691 | - |
| dc.rights.note | 同意授權(限校園內公開) | - |
| dc.date.accepted | 2024-07-12 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 電子工程學研究所 | - |
| 顯示於系所單位: | 電子工程學研究所 | |
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