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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 黃建璋 | zh_TW |
| dc.contributor.advisor | Jian-Jang Huang | en |
| dc.contributor.author | 朱昱全 | zh_TW |
| dc.contributor.author | Yu-Chuan Chu | en |
| dc.date.accessioned | 2024-05-15T16:05:28Z | - |
| dc.date.available | 2024-05-16 | - |
| dc.date.copyright | 2024-05-15 | - |
| dc.date.issued | 2024 | - |
| dc.date.submitted | 2024-05-13 | - |
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Rodin, "Semipolar Gallium Nitride on Silicon: Technology and Properties," Reviews on Advanced Materials Science, vol. 38, no. 1, pp. 75-93, Aug 2014. [Online]. Available: <Go to ISI>://WOS:000340982900008. [45] M. T. Hardy, D. F. Feezell, S. P. DenBaars, and S. Nakamura, "Group III-nitride lasers: a materials perspective," Materials Today, vol. 14, no. 9, pp. 408-415, Sep 2011, doi: Doi 10.1016/S1369-7021(11)70185-7. | - |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/92628 | - |
| dc.description.abstract | 垂直式溝槽閘極金氧半場效電晶體是現今氮化鎵基板上主流的垂直型電晶體之一。為了製造此結構中關鍵的閘極溝槽，通常使用電漿耦合式離子蝕刻機進行乾式蝕刻。然而在乾式蝕刻過程中，閘極溝槽的側壁可能會受損，導致電晶體性能下降。許多研究試圖改進這一步驟，以增強電晶體特性。例如：在沉積閘極氧化層之前沉積一層薄的氮化矽層，或在乾式蝕刻後進行濕式蝕刻，以去除側壁表面的受損材料。然而目前尚無研究討論使用不同濕式蝕刻溶液對電晶體特性的影響。
在這項研究中，我們使用相同的磊晶層和製程，製作了半垂直式溝槽閘極金氧半場效電晶體，但採用了不同的濕式蝕刻溶液。使用氫氧化四甲基銨濕蝕刻的電晶體具有更高的電流密度，而使用磷酸濕蝕刻的電晶體則具有更高的閾值電壓。我們分析了使用氫氧化四甲基銨和磷酸進行濕式蝕刻所造成的差異，並提供這些差異的解釋和證據。本研究旨在為垂直式溝槽閘極金氧半場效電晶體的進展提供更多的見解。 | zh_TW |
| dc.description.abstract | Vertical trench gate MOSFETs are one of the mainstream vertical transistors on GaN substrate nowadays. To fabricate gate trench, Inductively Coupled Plasma-Reactive Ion Etching (ICP-RIE) is commonly used for dry etching. However, during the dry etching process, the sidewalls of the gate trench can be damaged, leading to degradation in device performance. Therefore, numerous studies have attempted to improve this step in the process to enhance device characteristics. For example, depositing a thin layer of Silicon Nitride before depositing the gate oxide, or performing wet etching with TMAH after dry etching to remove damaged material from the sidewall surface. However, there has been no research discussing the effects of using different wet etching solutions on device characteristics.
In this work, we fabricated quasi-vertical trench gate MOSFETs using the same epitaxial layer and process but employing different wet etching solutions. The TMAH device has higher current density, while H3PO4 device has higher threshold voltage. We analyze the differences caused by wet etching with TMAH and phosphoric acid and provide explanations and evidences for these differences. This study aims to provide more insight into the advancement of Vertical trench gate MOSFETs. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2024-05-15T16:05:28Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2024-05-15T16:05:28Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | 口試委員審定書 i
致謝 ii 中文摘要 iii ABSTRACT iv CONTENTS v LIST OF FIGURE vii LIST OF TABLE ix Chapter 1 Introduction 1 1.1 Background and overview 1 1.2 Motivation and Purpose 8 1.3 Thesis Outline 10 Chapter 2 First Round Fabrication and Result 12 2.1 Design of Trench Gate MOSFET Structure and Layout 12 2.2 Process Flow of Device Fabrication 15 2.3 Result and Trouble Shooting 17 Chapter 3 Second Round Device Fabrication 20 3.1 Design of Hexagonal Trench Gate MOSFET Structure and Layout 20 3.2 Process Flow of Device Fabrication 23 Chapter 4 Results and Discussion 25 4.1 DC Characteristics Analysis 25 4.2 Impact of Wet Etching on the Channel 28 Chapter 5 Conclusion and Future Work 35 5.1 Conclusion 35 5.2 Future work 37 References 38 | - |
| dc.language.iso | en | - |
| dc.subject | 閾值電壓 | zh_TW |
| dc.subject | 磷酸 | zh_TW |
| dc.subject | 電流密度 | zh_TW |
| dc.subject | 垂直式溝槽閘極金氧半場效電晶體 | zh_TW |
| dc.subject | 氮化鎵 | zh_TW |
| dc.subject | 氫氧化四甲基銨 | zh_TW |
| dc.subject | threshold voltage | en |
| dc.subject | GaN | en |
| dc.subject | vertical trench gate MOSFETs | en |
| dc.subject | TMAH | en |
| dc.subject | H3PO4 | en |
| dc.subject | current density | en |
| dc.title | 基於氮化鎵基板之半垂直式溝槽閘極金氧半場效電晶體製程開發與特性分析 | zh_TW |
| dc.title | Fabrication and Characterization of Gallium Nitride-Based Quasi-Vertical Trench Gate Metal-Oxide-Semiconductor Field-Effect Transistors | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 112-2 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 陳敏璋;賴韋志;吳育任;吳肇欣 | zh_TW |
| dc.contributor.oralexamcommittee | Miin-Jang Chen;Wei-Chi Lai;Yuh-Renn Wu;Chao-Hsin Wu | en |
| dc.subject.keyword | 氮化鎵,垂直式溝槽閘極金氧半場效電晶體,氫氧化四甲基銨,磷酸,電流密度,閾值電壓, | zh_TW |
| dc.subject.keyword | GaN,vertical trench gate MOSFETs,TMAH,H3PO4,current density,threshold voltage, | en |
| dc.relation.page | 42 | - |
| dc.identifier.doi | 10.6342/NTU202400965 | - |
| dc.rights.note | 同意授權(限校園內公開) | - |
| dc.date.accepted | 2024-05-14 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 光電工程學研究所 | - |
| dc.date.embargo-lift | 2029-05-13 | - |
| 顯示於系所單位： | 光電工程學研究所 | |
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