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DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 盧信嘉 | zh_TW |
dc.contributor.advisor | Hsin-Chia Lu | en |
dc.contributor.author | 楊宗霖 | zh_TW |
dc.contributor.author | Tsung-Lin Yang | en |
dc.date.accessioned | 2024-03-26T16:27:00Z | - |
dc.date.available | 2024-03-30 | - |
dc.date.copyright | 2024-03-26 | - |
dc.date.issued | 2024 | - |
dc.date.submitted | 2024-03-21 | - |
dc.identifier.citation | [1] 5G維基百科: https://technews.tw/2017/12/19/far-spread-talk-about-5g-applications/
[2] 吳鋼. 淺談4G. Available: http://yuweneve.pixnet.net/blog/post/43617168-%E3%80%90%E8%AD%B0%E9%A1%8C%E3%80%91%E6%B7%BA%E8%AB%874g [3] 5G網路與4G相比,有何優點與缺點?: https://terasense.com/terahertz-technology/millimeter-wave-technology/ [4] 電磁波對大氣衰減:https://wiki.dfrobot.com/What_is_mmWave_Millimeter_Wave [5] L. Cai, M. J. Chik and K. M. Cheng, "A compact, linearly-polarized antenna design with electronically steerable angle of orientation," 2014 Asia-Pacific Microwave Conference, Nov. 2014, pp. 616-618. [6] L. Cai, Y. Cheng and K. M. Cheng, "A steerable linearly-polarized antenna design based upon a novel variable signal splitter," 2017 IEEE Asia Pacific Microwave Conference (APMC), Nov. 2017, pp. 116-119, doi: 10.1109/APMC.2017.8251391. [7] L. Cai, Y. Cheng and K. M. Cheng, "Polarization reconfigurable antenna design using a novel and compact variable signal splitter," 2017 IEEE Asia Pacific Microwave Conference (APMC), Nov. 2017, pp. 112-115, doi: 10.1109/APMC.2017.8251390. [8] Y. Jiang, X. Q. Lin, Fei Cheng, J. Zhang and Y. Fan, "A linear polarization continuously sweeping antenna with a variable power divider based on CRLH transmission line," 2015 IEEE MTT-S International Microwave Symposium, May 2015, pp. 1-4, doi: 10.1109/ MWSYM.2015.7167054. [9] B. Lin, A. Ahmed and H. Wang, "A 26–32-GHz dual-polarization receiver front-end with rapid-response mixed-signal polarization alignment for ultrareliable low-latency communications," IEEE Solid-State Circuits Letters, vol. 4, pp. 222-225, Nov. 2021, doi: 10.1109/LSSC.2021.3125681. [10] S. Y. Zheng, W. S. Chan, and K. F. Man, "Broadband phase shifter using loaded transmission line," IEEE Microwave and Wireless Components Letters, vol. 20, no. 9, pp. 498-500, Sep. 2010. [11] F. Ellinger, H. Jackel, and W. Bachtold, "Varactor-loaded transmission-line phase shifter at C-band using lumped elements," IEEE Transactions on Microwave Theory and Techniques, vol. 51, no. 4, pp. 1135-1140, Apr. 2003. [12] W. Li, Y. Kuo, Y. Wu, J. Cheng, T. Huang, and J. Tsai, "An X-band full-360° reflection type phase shifter with low insertion loss," in 2012 42nd European Microwave Conference, Nov. 2012, pp. 1134-1137. [13] W. T. Li, Y. C. Chiang, J. H. Tsai, H. Y. Yang, J. H. Cheng, and T. W. Huang, "60- GHz 5-bit phase shifter with integrated VGA phase-error compensation," IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 3, pp. 1224-1235, Mar. 2013. [14] J. H. Tsai, C. K. Liu, and J. Y. Lin, "A 12 GHz 6-bit switch-type phase shifter MMIC," 2014 44th European Microwave Conference, pp. 1916-1919, Oct. 2014. [15] E. V. Balashov and I. A. Rumyancev, "A fully integrated 6-bit vector-sum phase shifter in 0.18 um CMOS," in 2015 International Siberian Conference on Control and Communications (SIBCON), May 2015, pp. 1-5. [16] B. Cetindogan, E. Ozeren, B. Ustundag, M. Kaynak, and Y. Gurbuz, "A 6 bit vector-sum phase shifter with a decoder based control circuit for X-band phased-arrays," IEEE Microwave and Wireless Components Letters, vol. 26, no. 1, pp. 64-66, Jan. 2016. [17] B. Cetindogan, B. Ustundag, A. Burak, M. Wietstruck, M. Kaynak, and Y. Gurbuz, "A 5–13 GHz 6-bit vector-sum phase shifter with +3.5 dBm IP1dB in 0.25-μm SiGe BiCMOS," in 2017 IEEE Asia Pacific Microwave Conference (APMC), Nov. 2017, pp. 1111-1114. [18] Y.-T. Chang, Z.-W. Ou, H. Alsuraisry, A. Sayed and H.-C. Lu, "A 28-GHz low-power vector-sum phase shifter using biphase modulator and current reused technique," IEEE Microwave and Wireless Components Letters, vol. 28, no. 11, pp. 1014-1016, Nov. 2018. [19] 洪尚毅,"應用CMOS 180 nm 製程實現Ka頻段線性極化旋轉器晶片" 臺灣大學電子工程研究所論文, May 2023. [20] D. M. Pozar, Microwave Engineering. John Eiley & Ssons, 2011. [21] G. Gonzalez, Microwave transistor Amplifiers Analysis and Design. Prentice-Hall, Inc., 1996. [22] B. Razavi and R. Behzad, RF Microelectronics. Prentice hall New York, 2012. [23] J. Qiu, J. Pang, B. Liu, Y. Wang, Y. Zhang and K.Okada, "A CMOS 24–30-GHz low-phase-variation variable gain amplifier design for 5G new radio," in IEEE Solid-State Circuits Letters, vol. 5, pp. 146-149, 2022. [24] F. Qiu, H. Zhu, W. Che and Q. Xue, "A simplified vector-sum phase shifter topology with low noise figure and high voltage gain," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 30, no. 7, pp. 966-974, July 2022. [25] I. S. Song, J. G. Lee, G. Yoon and C. S. Park, "A low power LNA-phase shifter with vector sum method for 60 GHz beamforming receiver," in IEEE Microwave and Wireless Components Letters, vol. 25, no. 9, pp. 612-614, Sept. 2015. [26] Kai Chang, Encyclopedia of RF and Microwave Engineering, Hoboken, New Jersey, John Wiley & Sons, 2005, pp. 4082 [27] F. Akbar and A. Mortazawi, "A frequency tunable 360° analog CMOS phase shifter with an adjustable amplitude," IEEE Trans. on Circuits Syst. II, Exp. Briefs, vol. 64, no. 12, pp. 1427-1431, Dec. 2017. [28] F. Fadhuile, T. Taris, Y. Deval, C. Enz and D. Belot, "Design methodology for low power RF LNA based on the figure of merit and the inversion coefficient," 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS), Marseille, France, 2014, pp. 478-481 | - |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/92523 | - |
dc.description.abstract | 本論文主要設計向量合成雙輸出相移器(dual-output vector sum phase shifter)與雙輸入線性極化旋轉器(linear polarization rotator),中心頻率操作於28GHz。向量合成相移器可應用於波束賦形系統,線性極化旋轉器可應用於極化天線陣列,兩者皆使用於第五代通訊系統中。本論文兩顆晶片皆使用台積電180 nm CMOS製程,並在台灣半導體研究中心進行量測。
本論文第一顆晶片為Ka 頻段雙輸出相移器,用具有類比控制與可變增益功能的主動式功率分配器與雙輸出來降低相移器所需功耗。雙輸出的相移器可以使用90°耦合器的兩個輸出驅動陣列中的兩個單元天線,因此僅使用一組相移器就可以產生2θ-90的相位差。此電路在雙輸出下在28GHz量測結果可在 70°的相位差內實現等效4位元解析度。使用雙輸出時的相位的方均根誤差是根據兩輸出的相位差下去計算。相位的方均根誤差值為1.82°。兩輸出的振幅增益約在3.5~4.2dB之間,3dB頻寬約在24.9~30.2GHz之間,而方均根誤差分別為0.27dB與0.47dB,晶片面積為0.48mm2,直流功耗為16.2mW。 本論文第二顆晶片為Ka 頻段線性極化旋轉器,本電路分三個部分組成,第一與第三部份為90°之耦合器,第二部分為兩路向量合成相移器。相移器改為使用數位控制的主動式可變增益功率分配器實現,更方便與數位電路整合。此電路將兩個輸入訊號的功率均等分配,透過兩個向量和相移器之間的相位差實現兩個互相垂直的線性極化訊號旋轉。每個輸入可覆蓋90°的旋轉範圍,兩個輸入總共為180°。此電路在28GHz量測結果為傾斜角的方均根誤為2.48°,而長軸的平均與方均根誤差分別為2.13dB與0.42dB。在16種狀態中除了兩種狀態的軸比是小於20dB的,最差的軸比為18.07dB,其他狀態軸比均大於20dB。晶片面積為1.06mm2,直流功耗為26.6mW。第二顆晶片在佈局時因佈局設計疏失,使輸出走線碰到dummy金屬,因此導致輸出的寄生電容量遠超出預期,而使輸出匹配的表現不如預期。輸入匹配則皆在-20dB以下。 | zh_TW |
dc.description.abstract | This thesis presents a dual-output vector sum phase shifter and a dual-input linear polarization rotator, with the center frequency operating at 28GHz. The vector sum phase shifters can be used in beamforming systems, and the linear polarization rotators can be used in polarized antenna arrays. Both circuit can be applied in fifth-generation communication systems. These two chips are implemented by TSMC's 180 nm CMOS process and are measured at the Taiwan Semiconductor Research Institute.
The first chip is a Ka-band dual-output phase shifter. An active power splitter with analog control and variable gain functions and dual outputs are used to reduce the power consumption of the phase shifter. A dual-output phase shifter can use the two outputs of a 90° coupler to drive two element antennas in an array, thus producing a 2θ-90 phase difference using only one set of phase shifter. The measurement results of this circuit at 28GHz under dual output can achieve equivalent 4-bit resolution within a phase difference range of 70°. When using dual outputs, the root mean square (RMS) error of the phase is calculated based on the phase difference between the two outputs. The RMS error of the phase is 1.82°. The amplitude gain of the two outputs is about 3.5~4.2dB, the 3dB bandwidth is about 24.9~30.2GHz, and the RMS errors are 0.27dB and 0.47dB respectively. The chip area is 0.48mm2, and the DC power consumption is 16.2mW. The second chip is a Ka-band linear polarization rotator. This circuit is composed of three parts. The first and third parts are 90° couplers, and the second part includes two vector sum phase shifters. The phase shifters are changed to digitally controlled active variable gain power splitters, making it easier to integrate with digital circuits. This circuit equally distributes the power of two input signals, and realize the rotation of two orthogonal linear polarization rotation signals through phase difference between two vector sum phase shifters. Each input port covers a rotation range of 90°, for a total of 180° with both inputs. The measurement at 28GHz shows that RMS error of tilt angle is 2.48°, and the average and RMS errors of OA are 2.13dB and 0.42dB respectively. Among the 16 states, the AR of two states is less than 20dB, and the worst AR is 18.07dB. Other states have higher than 20dB AR. The chip area is 1.06mm2 and the DC power consumption is 26.6mW. Due to the error at layout of the second chip, the output traces touched the dummy metal, which caused the parasitic capacitance of the output to be far larger than expected, making the output reflection performance not as good as expected. However, input return loss are better than 20dB. | en |
dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2024-03-26T16:27:00Z No. of bitstreams: 0 | en |
dc.description.provenance | Made available in DSpace on 2024-03-26T16:27:00Z (GMT). No. of bitstreams: 0 | en |
dc.description.tableofcontents | 誌謝 ii
中文摘要 iii ABSTRACT iv 目次 v 圖次 viii 表次 xii Chapter 1 緒論 1 1.1 研究動機與背景 1 1.2 文獻回顧 2 1.2.1 線性極化旋轉器 2 1.2.2 相移器 4 1.3 論文貢獻 8 1.4 章節介紹 9 Chapter 2 可變增益放大器與相移器電路介紹 10 2.1 簡介 10 2.2 放大器重要參數介紹 10 2.2.1 放大器參數介紹 10 2.2.2 穩定度 12 2.3 可變增益放大器電路介紹 14 2.3.1 電壓控制可變增益放大器 14 2.3.2 電流控制可變增益放大器 15 2.3.3 低相位變化可變增益放大器 17 2.3.4 雙輸出可變增益功率分配放大器 18 2.4 相移器之重要參數介紹 19 2.4.1 RMS 相位誤差 19 2.4.2 RMS 振幅誤差 20 2.5 向量合式相移器電路介紹 20 Chapter 3 極化理論及整體系統架構 22 3.1 極化概論簡介 22 3.1.1 線性極化 23 3.1.2 圓極化 24 3.1.3 橢圓極化 25 3.1.4 橢圓極化參數 25 3.2 設計概念及整體架構圖 26 Chapter 4 Ka頻段雙輸出相移器電路設計 33 4.1 簡介 33 4.2 規格制定 33 4.3 電路架構 34 4.4 電路設計 35 4.4.1 類比式可變功率分配器設計 35 4.4.2 正交耦合器之設計 42 4.5 電路佈局 45 4.6 電路模擬結果 45 4.6.1 整體架構之小訊號模擬結果 46 4.6.2 整體架構之穩定度模擬結果 52 Chapter 5 Ka頻段雙輸入線性極化旋轉器設計 54 5.1 簡介 54 5.2 規格制定 54 5.3 電路架構 55 5.4 電路設計 57 5.4.1 數位式可變增益功率器設計 57 5.4.2 正交耦合器設計 67 5.4.3 相移器設計 70 5.5 電路佈局 72 5.6 電路模擬結果 73 5.6.1 整體架構之小訊號模擬結果 73 Chapter 6 電路量測 81 6.1 量測準備 81 6.1.1 偏壓及控制訊號 81 6.1.2 量測環境 81 6.2 量測結果 82 6.2.1 雙輸出相移器量測結果 82 6.2.2 線性極化旋轉器量測結果 88 6.3 問題與討論 97 6.3.1 線性極化旋轉器 97 Chapter 7 結論與未來展望 105 7.1 結論 105 7.2 未來與展望 107 參考文獻 110 | - |
dc.language.iso | zh_TW | - |
dc.title | 使用可變增益功率分配器實現之Ka頻段向量合成雙輸出相移器與Ka頻段線性極化旋轉器 | zh_TW |
dc.title | Ka-band Vector-sum Dual-output Phase Shifter and Ka-band Linear Polarization Rotator Using Variable Gain Power Splitter | en |
dc.type | Thesis | - |
dc.date.schoolyear | 112-2 | - |
dc.description.degree | 碩士 | - |
dc.contributor.oralexamcommittee | 蔡政翰;張譽騰;王雲杉 | zh_TW |
dc.contributor.oralexamcommittee | Jeng-Han Tsai;Yu-Teng Chang;Yun-shan Wang | en |
dc.subject.keyword | 5G通訊,Ka 頻段,向量合成相移器,可變增益功率分配器,雙輸出相移器,線性極化旋轉器, | zh_TW |
dc.subject.keyword | 5G communications,Ka-band,Vector sum phase shifter(VSPS),variable gain power splitter,dual-output phase shifter,linear polarization rotator, | en |
dc.relation.page | 112 | - |
dc.identifier.doi | 10.6342/NTU202400798 | - |
dc.rights.note | 同意授權(限校園內公開) | - |
dc.date.accepted | 2024-03-22 | - |
dc.contributor.author-college | 電機資訊學院 | - |
dc.contributor.author-dept | 電子工程學研究所 | - |
顯示於系所單位: | 電子工程學研究所 |
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