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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 呂良鴻 | zh_TW |
dc.contributor.advisor | Liang-Hung Lu | en |
dc.contributor.author | 許博堯 | zh_TW |
dc.contributor.author | Po-Yao Hsu | en |
dc.date.accessioned | 2024-03-22T16:14:37Z | - |
dc.date.available | 2024-03-23 | - |
dc.date.copyright | 2024-03-22 | - |
dc.date.issued | 2024 | - |
dc.date.submitted | 2024-02-24 | - |
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Pokharel, “Capacitive Feedbacked Cold-Phase Compensator Analog Pre-Distorter and PAE Enhancer for K-Band CMOS PAs,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 69, no. 12, pp.4969–4980, 2022. [56] Y.-C. Chen, Y.-H. Lin, J.-L. Lin, and H. Wang, “A Ka-Band Transformer-Based Doherty Power Amplifier for Multi-Gb/s Application in 90-nm CMOS,” IEEE Microwave and Wireless Components Letters, vol. 28, no. 12, pp. 1134–1136, 2018. | - |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/92382 | - |
dc.description.abstract | 本論文以TSMC 0.18-um CMOS製程實現適用於低軌道衛星通訊的射頻低雜訊放大器與功率放大器。
第一個晶片為接收端的低雜訊放大器,由於低軌道衛星通訊接收端分配到的頻寬高達2 GHz,故寬頻的設計是透過交錯頻率調整技術輔以頻寬延展技術來達成,而低雜訊是透過變壓器回授、正基體偏壓與電容負回授來實現。此晶片的3-dB頻寬為9.9 – 13.5 GHz,最大增益為17.1 dB,在其頻寬內的雜訊指數為4.4 – 5.4 dB。 第二個晶片為發射端的功率放大器,透過採用反相技術來達到基本的線性度提升,此外,基於該反相技術的兩級設計,本晶片再加入阻抗調整機制,來進一步優化其線性度的改善。此晶片的晶片上量測結果為,最大輸出功率為9.5 dBm,輸出1-dB壓縮點為8.8 dBm,而晶片上量測搭配印刷電路板的偏壓設計,最大輸出功率為9.4 dBm,輸出1-dB壓縮點為9.0 dBm,皆有高線性度的展現。 | zh_TW |
dc.description.abstract | The low-noise amplifier and the power amplifier fabricated in TSMC 0.18-um CMOS process for low earth orbit satellite communication are discussed in this thesis.
The proposed low-noise amplifier is completed with staggered tuning technique, bandwidth extension technique, gate-source transformer feedback, forward body bias, and capacitive negative feedback. Therefore, the characteristics of both wideband and low NF can be achieved. The measured results of the proposed low-noise amplifier show the 3-dB frequency of 9.9 - 13.5 GHz, the peak gain of 17.1 dB, and the NF of 4.4 - 5.4 dB. The proposed power amplifier is designed with antiphase technique for high linearity. In order to further improve the overall linearity, the impedance tuning network is inserted into the circuit. The proposed power amplifier shows saturated output power of 9.5 dBm and output 1-dB compression point of 8.8 dBm in on-wafer measurement, while output power of 9.4 dBm and output 1-dB compression point of 9.0 dBm in on-wafer measurement with PCB bias network, indicating that the proposed antiphase power amplifier with the impedance tuning network demonstrates high linearity. Overall, the design and implementation of Ku-band RF front-end circuits are completely presented. | en |
dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2024-03-22T16:14:37Z No. of bitstreams: 0 | en |
dc.description.provenance | Made available in DSpace on 2024-03-22T16:14:37Z (GMT). No. of bitstreams: 0 | en |
dc.description.tableofcontents | Chinese Approval i
Approval iii Acknowledgement v Chinese Abstract vii Abstract ix List of Figures xv List of Tables xxi 1 Introduction 1 1.1 Motivation 1 1.2 Thesis Organization 3 2 Background 5 2.1 Low Noise Amplifier (LNA) 5 2.1.1 Noise Figure (NF) 6 2.1.2 Common Source LNA 6 2.1.3 Common Gate LNA 7 2.2 Power Amplifier (PA) 8 2.2.1 Drain Efficiency (DE) and Power Added Efficiency (PAE) 9 2.2.2 Load Line Theory 9 2.2.3 Power Back-Off (PBO) 11 2.3 Stability 12 2.4 Nonlinearity 12 2.5 On-Chip Transformer 17 3 A Transformer-Based LNA with Capacitive Negative Feedback for Ku-Band Satellite Communications 21 3.1 Design Challenges in LNA 21 3.2 Related Techniques 24 3.2.1 Current-Reused 24 3.2.2 Single-Ended Neutralization Technique 25 3.2.3 Noise Canceling 27 3.2.4 Common Gate with Feedforward 28 3.3 Design Considerations 29 3.3.1 Gate-Source Transformer Feedback 30 3.3.2 Forward Body Bias Technique 31 3.3.3 Staggered Tuning Technique 33 3.3.4 Bandwidth Extension Technique 34 3.3.5 Capacitive Negative Feedback 37 3.4 Circuit Implementation 41 3.5 Experimental Results 44 3.6 Comparison Table 47 3.7 Remarks 49 4 An Anti-Phase PA with Impedance Tuning Linearization for Ku-Band Satellite Communications 51 4.1 Design Challenges in PA 51 4.2 Related Techniques 52 4.2.1 Pre-Distortion Linearizer 53 4.2.2 Stacked FETs 54 4.2.3 Doherty PA 57 4.2.4 Derivative Superposition 58 4.2.5 Dual-Power Mode 59 4.2.6 Common Drain with Neutralization Technique 60 4.2.7 Adaptive Bias 62 4.2.8 Envelope Tracking 63 4.3 Design Considerations 63 4.3.1 Antiphase 64 4.3.2 Forward Body Bias Technique 68 4.3.3 Impedance Tuning Network 69 4.4 Circuit Implementation 79 4.5 Experimental Results 84 4.5.1 On-Wafer Measurement 87 4.5.2 On-Wafer Measurement with PCB Bias Network 94 4.6 Comparison Table 97 4.7 Remarks 98 5 Conclusion 99 Reference 101 | - |
dc.language.iso | en | - |
dc.title | Ku頻段低雜訊放大器和功率放大器的設計與實現 | zh_TW |
dc.title | Design and Implementation of Ku-Band Low-Noise Amplifier and Power Amplifier | en |
dc.type | Thesis | - |
dc.date.schoolyear | 112-2 | - |
dc.description.degree | 碩士 | - |
dc.contributor.oralexamcommittee | 蔡宗亨;林宗賢 | zh_TW |
dc.contributor.oralexamcommittee | Tsung-Heng Tsai;Tsung-Hsien Lin | en |
dc.subject.keyword | 互補式金屬氧化物半導體,低軌道衛星通訊,射頻,低雜訊放大器,功率放大器,寬頻,線性度, | zh_TW |
dc.subject.keyword | low earth orbit satellite communication (LEO),CMOS,radio frequency (RF),low-noise amplifier (LNA),power amplifier (PA),wideband,linearity, | en |
dc.relation.page | 109 | - |
dc.identifier.doi | 10.6342/NTU202400747 | - |
dc.rights.note | 未授權 | - |
dc.date.accepted | 2024-02-26 | - |
dc.contributor.author-college | 電機資訊學院 | - |
dc.contributor.author-dept | 電子工程學研究所 | - |
顯示於系所單位: | 電子工程學研究所 |
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